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MT9076 参数 Datasheet PDF下载

MT9076图片预览
型号: MT9076
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1 / J1 3.3V单芯片收发器 [T1/E1/J1 3.3V Single Chip Transceiver]
分类和应用:
文件页数/大小: 160 页 / 413 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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Preliminary Information  
MT9076  
20.2.1 Per Channel Receive signaling (T1 and E1 mode) (Pages 9 and 0AH)  
Page 09H, addresses 10000 to 11111, and page 1AH addresses 10000 to 10111 contain the Receive signaling  
Control Words for DS1 channels 1 to 16 and 17 to 24 respectively. Table 85 illustrates the mapping between the  
addresses of these pages and the DS1 channel numbers. Table 86 describes bit allocation within each of these  
registers.  
Page 9 Address:  
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10 11 12 13 14 15  
Equivalent DS1  
channel  
10 11 12 13 14 15 16  
Page A Address:  
0
1
2
3
4
5
6
7
8
x
9
x
10 11 12 13 14 15  
Equivalent DS1  
channel  
17 18 19 20 21 22 23 24  
x
x
x
x
x
x
Table 84 - Page 9, A Address Mapping to DS1 Channels (T1)  
Bit  
Name  
Functional Description  
7 - 4  
3
- - -  
Unused  
A(n)  
Receive signaling Bits A for Channel n. These bits are extracted from bit position 8 of  
every channel in received frame 6 (within the 12 frame superframe structure for D4  
superframes and the 24 frame structure for ESF superframes). The bits may be debounced  
for 6 to 9 milliseconds where control bit DBNCE is set high.  
3
2
0
B(n)  
C(n)  
D(n)  
Receive signaling Bits B for Channel n. These bits are extracted from bit position 8 of  
every channel in received frame 12 (within the 12 frame superframe structure for D4  
superframes and the 24 frame structure for ESF superframes). The bits may be debounced  
for 6 to 9 milliseconds where control bit DBNCE is set high.  
Receive signaling Bits C for Channel n. These bits are extracted from bit position 8 of  
every channel in received frame 18 within the 24 frame structure for ESF superframes. The  
bits reported may be debounced for 6 to 9 milliseconds where control bit DBNCE is set high.  
In D4 mode these bits are unused.  
Receive signaling Bits D for Channel n. These bits are extracted from bit position 8 of  
every channel in received frame 24 within the 24 frame structure for ESF superframes. The  
bits reported may be debounced for 6 to 9 milliseconds where control bit DBNCE is set high.  
In D4 mode these bits are unused.  
Table 85 - Receive Channel Associated signaling (Pages 9 and A) (T1)  
91  
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