MT8986
STA bits used to
select
subsections of the
Connection
Memory
Input Address pins used to
select individual
Connection and Data
Memory positions within the
selected subsection
STA bits used to
select subsections
of the Data
Identical
I/O
Rate
# of Input x
Output
Streams
Memory
2 Mb/s
2 Mb/s *
2 Mb/s *
8x8
4x4 *
16x8 *
STA2, STA1, STA0
STA1, STA0
STA2, STA1, STA0
STA1, STA0
A4, A3, A2, A1, A0
A4, A3, A2, A1, A0
A4, A3, A2, A1, A0
STA3, STA2, STA1,
STA0
STA2, STA1, STA0
4 Mb/s
4 Mb/s
8 Mb/s
4x4
8x4
2x2
8x4
STA1, STA0
STA1, STA0
STA1, STA0
STA0
A6, A4, A3, A2, A1, A0
A6, A4, A3, A2, A1, A0
A7, A6, A4, A3, A2, A1, A0
A6, A4, A3, A2, A1, A0 **
STA2, STA1, STA0
STA0
Nibble Switch
(2 Mb/s)
STA2, STA1, STA0
STA1, STA0
Table 6. Use of STA Bits for Identical I/O Data Rate Operation
* - only in the 44 pin packages.
** - for Data Memory Read operations A0 is not required since two nibbles are provided per read access.
STA bits used STA bits used Input Address pins used Input Address pins used
Input x
Output
Streams
Config.
Different
I/O
Rate
to select
Data
to select
Connection
Memory
to access individual
Data Memory
to access individual
Connection Memory
positions within the
selected subsection
Memory
subsections
positions within the
selected subsection
subsections
2 Mb/s to
4 Mb/s
8x4
8x2
4x8
2x8
STA2, STA1,
STA0
STA1, STA0
A4, A3, A2, A1, A0
A4, A3, A2, A1, A0
A6, A4, A3, A2, A1, A0
A6, A4, A3, A2, A1, A0
2 Mb/s to
8 Mb/s
STA2, STA1,
STA0
STA0
A7, A6, A4, A3, A2, A1,
A0
4 Mb/s to
2 Mb/s
STA1, STA0
STA2, STA1,
STA0
A4, A3, A2, A1, A0
8 Mb/s to
2 Mb/s
STA0
STA2, STA1,
STA0
A7, A6, A4, A3, A2, A1,
A0
A4, A3, A2, A1, A0
Table 7. Use of STA Bits for Different I/O Data Rate Operation
Note: In rate conversion applications, Data Memory subsections have different sizes than Connection Memory subsections. This
implies that different address inputs are used to select individual positions within the subsections for each type of memory.
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