ISO-CMOS
Functional Description
The MT8982 (MiniDX) provides cost effective time
switching capability for small size applications
utilizing up to two serial Time Division Multiplexed
(TDM) streams. Each TDM stream consists of 32 64
kb/s channels, giving the MiniDX a maximum
capacity of 64 channels. The input framing signal
may be either a ST-BUS or a GCI frame pulse. The
MT8982 will output a delayed or advanced frame
pulse in the opposite format to permit conversion
between the two formats.
The MiniDX can switch data from any channel in one
of the two serial input TDM streams to any channel in
either of the two serial output TDM streams. The
microcontroller controlling the MiniDX writes to the
MT8982 Connect Memory to establish the
connection between the required input TDM channel
and the selected output TDM channel(s). By reading
the Connect Memory the microcontroller can check
switched connections which have already been
established.
The MiniDX can also operate in message mode
where the microcontroller transmits the data on the
TDM serial stream. The microcontroller writes to the
MT8982 Connect Memory to transmit data on the
required output TDM channels. Reading the Data
Memory of the MT8982 allows the microcontroller to
receive messages from TDM input channels. These
operations are useful for control of other ST-BUS
components or for interprocessor communication.
MT8982
formatted frame pulse is active high at the beginning
of timeslot 5 (relative to the MT8982) and idles low.
The MT8982 automatically determines the type of
frame pulse from the level of the idle over five clock
periods. A ST-BUS formatted frame pulse resets the
internal address counters to zero. A GCI formatted
frame pulse resets the counters to five.
F0o outputs a frame pulse in the opposite format. If
F0i is a ST-BUS formatted frame pulse, F0o will be a
GCI formatted frame pulse delayed by five channels
after F0i. If F0i is a GCI formatted frame pulse, F0o
will be a ST-BUS formatted frame pulse delayed by
27 channels (32-5).
During normal operation every second falling edge of
the clock marks a timeslot boundary and the input
data is clocked in by the rising edge, three-quarters
of the way into the bit cell. The master clock must
be 4.096 MHz for the F0o signal to be valid and to
receive a GCI formatted F0i.
Data which is output onto a TDM serial output
channel may come from two sources; the Data
Memory or the Connect Memory. If a channel is
configured in connection mode, the source of output
data is the Data Memory. If a channel is configured
in message mode, the source of the output data is
the Connect Memory. Data destined for a particular
channel on the serial output links is read from the
data or connect memory in the previous channel
timeslot. This allows for delay in RAM access and
parallel-to-serial conversion.
Each output data
channel can also be placed in tristate mode.
When an output channel is in connection mode, the
TDM output data is read from a Data Memory
location pointed to by an address stored in the 64x8
bit Connect Memory.
The Connect Memory
locations are addressed sequentially, with each
location corresponding to an output TDM link/
channel. In the channel time before the data is to be
output, the contents of each Connect Memory
location are output to the address bus of the Data
Memory. The contents of the Data Memory at the
selected address are then transferred to the parallel-
to-serial converter. The parallel-to-serial converter
outputs onto the TDM serial stream during the
correct channel time. By having the output channel
specify the input channel, the user can route the
same input channel to several output channels. This
function is useful for broadcasting or resource
channel uses.
Hardware Description
TDM Interface
The MT8982 continuously receives TDM serial data
at 2048 kbit/s through two serial inputs. These serial
streams are then converted into a parallel format and
stored sequentially in a 64x8 bit Data Memory. The
sequential addressing is generated by an internal
counter that is reset by the input 8 kHz frame pulse
(F0i) which marks the frame boundaries of the
incoming serial data stream. This counter increments
with each timeslot so that it matches the binary count
of the timeslot of the incoming data. The TDM
timeslot count always corresponds to the ST-BUS
channel positions. An extra address bit is used to
differentiate between the two input data streams.
The input 8 kHz frame pulse may be either ST-BUS
or GCI formatted. A ST-BUS formatted frame pulse
is an active low signal which straddles the frame
boundary. It idles high the rest of the time. A GCI
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MITEL [ MITEL NETWORKS CORPORATION ]
