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MT8982AE 参数 Datasheet PDF下载

MT8982AE图片预览
型号: MT8982AE
PDF下载: 下载PDF文件 查看货源
内容描述: ISO- CMOS ST- BUS⑩系列小型数字开关( MiniDX ) [ISO-CMOS ST-BUS⑩ FAMILY Small Digital Switch (MiniDX)]
分类和应用: 开关电信集成电路光电二极管
文件页数/大小: 19 页 / 135 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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ISO-CMOS
Absolute Maximum Ratings
*
Parameter
1
2
3
4
5
Power supply voltage V
DD
-V
SS
Voltage on any pin
Current at any pin (other than supply)
Storage temperature
Package power dissipation
Symbol
V
DD
-V
SS
V
I
I
O
T
S
P
D
-65
V
SS
-0.3
Min
MT8982
Max
6
Units
V
V
mA
°C
mW
V
DD
+0.3
100
+150
1000
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Recommended Operating Conditions
- Voltages are with respect to ground (V
SS
) unless otherwise stated.
Characteristics
1
2
3
Operating Temperature
Power supply
Input voltage
Sym
T
OP
V
DD
V
I
Min
-40
4.5
V
SS
Typ
Max
+85
5.5
V
DD
Units
°C
V
V
Test Conditions
‡ Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
DC Electrical Characteristics
- Voltages are with respect to ground (V
SS
) unless otherwise stated.
Characteristics
1
2
3
4
5
6
7
8
9
10
Sym
V
DD
I
DD
I
DDS
V
IH
V
IL
I
IH
/I
IL
V
OL
V
OH
I
OL
Min
4.5
Typ
5.0
Max
5.5
2.0
100
Units
V
mA
µA
V
Test Conditions
Operating supply voltage
Operating supply current
Static supply current
High level input
Low level input voltage
Input leakage current
Low level output voltage
High level output voltage
Output low (sink) current
Outputs unloaded
All inputs =V
DD
2.0
0.8
10.0
0.4
2.4
4.0
V
µA
V
V
mA
V
IN
=V
SS
or V
DD
I
OL
= 4.0 mA
I
OH
= 2.0 mA
V
OUT
=0.4 V
Output high (source) current
I
OH
2.0
mA
V
OUT
=2.4V, V
DD
=4.5V
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
AC Electrical Characteristics
- Serial Microport (see Figure 12)
- Voltages are with respect to ground
(V
SS
) unless otherwise stated.
Characteristics
1
2
3
4
5
6
7
8
Chip Select Setup Time
RxD Input Setup Time
RxD Input Hold Time
TxD Output Delay
TxD Output Tristate Delay
SCLK Pulse Width High
SCLK Pulse Width Low
Command/Data Byte Delay Time
Sym
t
cs
t
rs
t
rh
t
td
t
daz
t
ppwh
t
ppwl
t
cdbd
Min
5
40
0
Typ
Max
Units
ns
ns
ns
Test Conditions
80
140
190
190
2
ns
ns
ns
ns
µs
C
L
=50pF, R
L
=1kΩ
C
L
=50pF, R
L
=1kΩ*
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* High impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.
2-41