MT8982
ISO-CMOS
Channel 31
Channel 0
F0i
C4
Bit 0
Microport
Mode
Wr DM
Link 0
Ch 31
Bit 1
Wr DM
Link 1
Ch 31
Bit 2
µP
Bit 3
Rd CM
Link 0
Ch 1
Bit 4
Rd DM
Link 0
Ch 1
Bit 5
Rd CM
Link 1
Ch 1
Bit 6
µP
Bit 7
Rd DM
Link 1
Ch 1
Serial Port Mode
Wr CM
Link 0
Ch 31
Wr CM
Link 1
Ch 31
Figure 4 - Internal Memory Access Windows
channels and is not dependent on the input and
output streams. The delays are given in Table 3.
The maximum delay is one frame plus one channel;
the minimum delay is two channels.
Input
Channel
n
n
Output
Channel
m = n, n+1
m > n+1
Device Programming
Microport Mode
In serial microport mode, the MT8982 is
programmed and read using microcycles which
consist of a command/address byte followed by a
data byte.
The Command/Address Byte is shown in Table 1.
Bits 0 and 1 are the command bits (Cmd0-1), and
are used to indicate the type of microcycle access.
The microcontroller can read the Data Memory, read
or write the Connect Memory, and set per-channel
message or connection mode. Bits 2 to 6 of the
command/address byte (Ch0-Ch4) correlate to a
channel on a TDM stream (0-31). Bit 7 (STREAM)
correlates to stream 0 or stream 1. These bits
address the corresponding Data Memory or Connect
Memory location.
The microcycle operations selected
command/address byte are as follows:
Read Connect Memory (Cmd0-1: 0,0)
Bits 0 to 7 of the addressed Connect Memory
location will be transmitted to the microcontroller
in the following data byte. Depending on what
the last Connect Memory write mode was, the
data transmitted could be a message byte or a
Connection Mode data byte.
by
the
Delay
m- n + 32 channels
m- n channels
n
m<n
32- (n-m) channels
Table 3. Input Channel to Output Channel Delay
Times
The following delays apply to writing data to the
Connect Memory in message mode. For stream 0,
data must be written to a Connect Memory location
at least one timeslot before the corresponding output
channel or the output data will be delayed by one
frame. For stream 1, data must be written at least
two timeslots before the output channel or the output
data will be delayed by one frame.
2-36
MITEL [ MITEL NETWORKS CORPORATION ]
