ISO-CMOS
Pin Description (continued)
Pin #
40
DIP
44
44
PLCC QFP
MT8981D
Name
Description
12
13-
15
16-
18
19
20
21
22-
24
25-
29
30
31-
34
35
36-
38
39
14
15-
17
19-
21
22
23
24
25-
27
29-
33
34
35-
38
39
41-
43
44
8
C4i
4.096 MHz Clock (Input).
ST-BUS bit cell boundaries lie on the alternate falling
edges of this clock.
9-11 A0-A2
Address 0 to 2 (Inputs).
These are the inputs for the address lines on the
microprocessor interface.
13-
15
16
17
18
19-
21
23-
27
28
29-
32
33
35-
37
38
A3-A5
Address 3 to 5 (Inputs).
These are the inputs for the address lines on the
microprocessor interface
DS
R/W
CS
Data Strobe (Input).
This is the input for the active high data strobe on the
microprocessor interface.
Read or Write (Input).
This is the input for the read/write signal on the
microprocessor interface - high for read, low for write.
Chip Select (Input).
This is the input for the active low chip select on the
microprocessor interface.
D7-D5
Data 7 to 5 (Three-state I/O Pins).
These are the bidirectional data pins on the
microprocessor interface.
D4-D0
Data 4 to 0 (Three-state I/O Pins).
These are the bidirectional data pins on the
microprocessor interface.
V
SS
IC
Power Input.
Negative Supply (Ground).
Internal Connections.
Leave pins disconnected.
STo3
ST-BUS Output 3 (Three-state Outputs).
These are the pins for the four 2048 kbit/s
ST-BUS output streams.
STo2-
ST-BUS Output 2 to 0 (Three-state Outputs).
These are the pins for the four 2048
STo0 kbit/s ST-BUS output streams.
ODE
Output Drive Enable (Input).
If this input is held high, the STo0-STo3 output drivers
function normally. If this input is low, the STo0-STo3 output drivers go into their high
impedance state.
NB:
Even when ODE is high, channels on the STo0-STo3 outputs
can go high impedance under software control.
IC
Internal Connection.
Leave pin disconnected.
40
1
39
2-19