MT8960/61/62/63/64/65/66/67 ISO2-CMOS
MT8962/63/66/67
MT8960/61/64/65
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
CSTi
DSTi
C2i
DSTo
VDD
SD5
SD4
F1i
GNDD
VRef
GNDA
VR
ANUL
VX
VEE
SD0
SD1
SD2
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
CSTi
DSTi
C2i
DSTo
VDD
F1i
CA
SD3
SD2
GNDD
VRef
GNDA
VR
ANUL
VX
VEE
SD0
SD1
CA
SD3
9
10
18 PIN CERDIP/PDIP
20 PIN PDIP/SOIC
Figure 2 - Pin Connections
Description
Pin Description
Pin Name
CSTi
Control ST-BUS In is a TTL-compatible digital input used to control the function of the filter/codec.
Three modes of operation may be effected by applying to this input a logic high (VDD), logic low
(GNDD), or an 8-bit serial word, depending on the logic states of CA and F1i.
Functions controlled are: powerdown, filter gain adjust, loopback, chip testing, SD outputs.
DSTi
C2i
Data ST-BUS In accepts the incoming 8-bit PCM word. Input is TTL-compatible.
Clock Input is a TTL-compatible 2.048 MHz clock.
DSTo Data ST-BUS Out is a three-state digital output driving the PCM bus with the outgoing 8-bit PCM
word.
VDD
F1i
Positive power Supply (+5V).
Synchronization Input is an active low digital input enabling (in conjunction with CA) the PCM input,
PCM output and digital control input. It is internally sampled on every positive edge of the clock, C2i,
and provides frame and channel synchronization.
CA
Control Address is a three-level digital input which enables PCM input and output and determines
into which control register (A or B) the serial data, presented to CSTi, is stored.
SD3
System Drive Output is an open drain output of an N-channel transistor which has its source tied to
GNDA. Inactive state is open circuit.
SD4-5 System Drive Outputs are open drain outputs of N-channel transistors which have their source tied
to GNDD. Inactive state is open circuit.
SD0-2 System Drive Outputs are “Totempole“ CMOS outputs switching between GNDD and V . Inactive
DD
state is logic low.
VEE
VX
Negative power supply (-5V).
Voice Transmit is the analog input to the transmit filter.
ANUL Auto Null is used to integrate an internal auto-null signal. A 0.1µF capacitor must be connected
between this pin and GNDA.
VR
GNDA Analog ground (0V).
Voice Receive is the analog output of the receive filter.
VRef
Voltage Reference input to D to A converter.
GNDD Digital ground (0V).
6-20
MITEL [ MITEL NETWORKS CORPORATION ]
