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MT8920B 参数 Datasheet PDF下载

MT8920B图片预览
型号: MT8920B
PDF下载: 下载PDF文件 查看货源
内容描述: ISO- CMOS ST- BUS⑩系列ST -BUS总线并行访问电路 [ISO-CMOS ST-BUS⑩ FAMILY ST-BUS Parallel Access Circuit]
分类和应用:
文件页数/大小: 24 页 / 497 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT8920B
CMOS
to CS to enable the device
connected on a common bus, to be driven by two
ST-BUS streams. Figure 9 shows how this "daisy
chaining" of STPA’s is implemented while Figure 10
illustrates the timing on the shared parallel bus.
connected directly
appropriately.
Common Bus
OE
WE
A0
A1
A2
A3
A4
MMS MS1 24/32
0
0
1
CS
STCH
STi0
STo0
Applications
Parallel PBX to Digital Trunk Interface
The STPA is an ideal component for interfacing
parallel PBX environments to Mitel’s family of digital
trunk devices.
Figure 11 shows a typical interface for both T1/ESF
and CRC-4 CEPT digital trunks to a system utilizing
a parallel bus architecture.
Both the MH89760B
T1/ESF and the MH89790B CRC-4 CEPT trunk
modules are shown interfaced to a parallel bus
structure using two STPAs operating in modes 1 and
2.
The first STPA operating in mode 2 (MMS=0,
MS1=1, 24/32=0), routes data and/or voice
information between the parallel telecom bus and the
T1 or CEPT link via DSTi and DSTo. The second
STPA, operating in mode 1 (MMS=1) provides
access from the signalling and link control bus to the
MH89760B or MH89790B status and control
channels. All signalling and link functions may be
controlled easily through the STPA transmit RAM’s
Tx0, Tx1, while status information is read at receive
RAM Rx0. In addition, interrupts can be set up to
notify the system in case of slips, loss of sync,
alarms, violations, etc.
OE
WE
A0
A1
A2
A3
A4
CS
DCS
STi0
STo0
MMS MS1 24/32
0
0
1
Figure 9 - "Daisy-chained" STPA’s in 32 Channel
Parallel Bus Controller Mode (Mode 3)
In order to facilitate efficient use of the parallel bus
another signal, similar to STCH, is supplied by the
STPA. Delayed Chip Select (DCS) becomes active
for the last half of each channel (Figure 19). This
may be connected to a second STPA, residing on the
same physical parallel bus, enabling it to perform its
read/write operations in the second half of each
channel. This allows a large number of devices,
CHANNEL N
ST-BUS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
C4i
Address
N+1
N-1
N+1
N-1
OE
WE
Data Bus
IN
OUT
IN
OUT
STCH
DCS
Figure 10 - Timing Relationship for Mode 3 Daisy Chaining
3-14