MT88L85
Advance Information
Motorola
RS0
R/W
Intel
WR
RD
FUNCTION
Write to Transmit
Data Register
Read from Receive
Data Register
Write to Control Register
Read from Status Register
0
0
1
1
0
1
0
1
0
1
0
1
1
0
1
0
Table 3. Internal Register Functions
b3
RSEL
b2
IRQ
b1
CP/DTMF
b0
TOUT
Table 4. CRA Bit Positions
b3
C/R
b2
S/D
b1
TEST
b0
BURST
ENABLE
Table 5. CRB Bit Positions
BIT
b0
NAME
TOUT
DESCRIPTION
Tone Output Control. A logic high enables the tone output; a logic low turns the tone output
off and places the complete DTMF transmitter circuit in power down mode. This bit
controls all transmit tone functions.
Call Progress or DTMF Mode Select. A logic high enables the receive call progress mode;
a logic low enables DTMF mode. In DTMF mode the device is capable of receiving and
transmitting DTMF signals. In CP mode a retangular wave representation of the received
tone signal will be present on the IRQ/CP output pin if IRQ has been enabled (control
register A, b2=1). In order to be detected, CP signals must be within the bandwidth
specified in the AC Electrical Characteristics for Call Progress.
Note: DTMF signals cannot be detected when CP mode is selected.
Interrupt Enable. A logic high enables the interrupt function; a logic low de-activates the
interrupt function. When IRQ is enabled and DTMF mode is selected (control register A,
b1=0), the IRQ/CP output pin will go low when either 1) a valid DTMF signal has been
received for a valid guard time duration, or 2) the transmitter is ready for more data (burst
mode only).
Register Select. A logic high selects control register B for the next write cycle to the
control register address. After writing to control register B, the following control register
write cycle will be directed to control register A.
Table 6. Control Register A Description
b1
CP/DTMF
b2
IRQ
b3
RSEL
4-80
MITEL [ MITEL NETWORKS CORPORATION ]
