MT8806
ISO-CMOS
24 PIN CERDIP/PLASTIC DIP
Figure 2 - Pin Connections
Pin Description
Pin #*
1-3
4
5
6
7
8
9
10
11
12
13
14-16
17
Name
Y2-Y0
DATA
X0
AX0
X1
AX1
X2
CS
X3
V
SS
V
EE
Description
Y2-Y0 Analog (Inputs/Outputs):
these are connected to the Y2-Y0 columns of the
switch array.
DATA (Input):
a logic high input will turn on the selected switch and a logic low will turn off
the selected switch. Active High.
X0 Analog (Input/Output):
this is connected to the X0 row of the switch array.
X0 Address Line (Input).
X1 Analog (Input/Output):
this is connected to the X1 row of the switch array.
X1 Address Line (Input).
X2 Analog (Input/Output):
this is connected to the X2 row of the switch array.
Chip Select (Input):
this is used to select the device. Active High.
X3 Analog (Input/Output):
this is connected to the X3 row of the switch array.
Digital Ground Reference.
Negative Power Supply.
AY0-AY2
Y0 -Y2 Address Lines (Inputs).
STROBE
STROBE (Input):
enables function selected by address and data. Address must be stable
before STROBE goes high and DATA must be stable on the falling edge of the STROBE.
Active High.
RESET
Y7-Y3
VDD
Master RESET (Input):
this is used to turn off all switches regardless of the condition of
CS. Active High.
Y7-Y3 Analog (Inputs/Outputs):
these are connected to the Y7-Y3 columns of the
switch array.
Positive Power Supply.
18
19-23
24
* Plastic DIP and CERDIP only
3-10
CS
X3
VSS
VEE
AY0
AY1
NC
Y2
Y1
Y0
DATA
X0
AX0
X1
AX1
X2
CS
X3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
Y3
Y4
Y5
Y6
Y7
RESET
STROBE
AY2
AY1
AY0
VEE
4
3
2
1
28
27
26
•
NC
Y0
Y1
Y2
VDD
Y3
Y4
12
13
14
15
16
17
18
NC
D0
J0
D1
J1
D2
J2
5
6
7
8
9
10
11
25
24
23
22
21
20
19
Y5
Y6
Y7
RESET
STROBE
AY2
NC
28 PIN PLCC