Preliminary Information
MH89790B
AC Electrical Characteristics† - CEPT Link Timing (Figures 25 and 26)
‡
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
2
3
4
5
6
7
8
Transmit Steering Delay
E2o Clock Period
tTSD
tPEC
tWEC
tRDS
tRDH
tRDW
tRDF
tRDR
150
488
244
50
ns
ns
ns
ns
ns
ns
ns
ns
See Figure 27, Note 1
E2o Clock Width High or Low
Receive Data Setup Time
Receive Data Hold Time
Receive Data Pulse Width
Receive Data Fall Time
Receive Data Rise Time
50
244
20
30
Note 1 - The difference between TTSD for OUTA and OUTB is tyically 20 ns.
† Timing is over recommended operating temperature and power supply voltage ranges.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
Transmitted CEPT Link
Bit Cells
Bit Cells
VIH
C2i
VIL
tTSD
tTSD
OUTA
or
OUTB
11.8V
1.2V
Figure 25 - Transmit Timing for CEPT Link
Received CEPT Link
Bit Cells
Bit Cell
tPEC
tWEC
tWEC
VOH
E2o
VOL
tRDS
tRDH
RxA
or
RxB
VOH
VOL
tRDF
tRDW
tRDR
FIgure 26 - Receive Timing for CEPT Link
4-211
MITEL [ MITEL NETWORKS CORPORATION ]
