ML2002 Preliminary
ꢀ Timing Diagram for slave mode display
ꢀ Functional Description
The display data should be input in reverse order from SEG48, SEG41… SEG2, SEG1 for proper display
of data.
i) Internal Power on reset
At power on the ML2002 will reset the internal register and counter as follows.
1. The display Data RAM is cleared.
2. The clock register will be cleared, the alarm will be disabled by setting the AE to logic 1, and the
RTC stops running by setting STOP to 1.
3. The command/data decoder will be reset to initial state.
P4/29
Preliminary, April 2007