CHP0205-QM
Electrical Characteristics
Advanced Product Information - July 2002
(2 of 4)
Unless otherwise specified, the following specifications are guaranteed at room temperature with collector voltage (+Vcc) = 3.4 V.
Parameter
Condition
Min
Typ
Max
Units
Frequency Range
Gain
Gain Ripple*
Gain Variation
Power Output
Harmonics
Noise Power in Receive Band
Linearity (ACPR)
Noise Figure
Input Return Loss
Efficiency
Positive Supply Current (Icc)
Quiescent Current (Iq)
Vref Supply Current (Iref)
Vref Supply Voltage (Vref)
Icntrl
Leakage Current
Pout = +28.0 dBm
Vcntrl = Low
Pout = +16.0 dBm
Vcntrl = High
824-849 MHz
Over supply voltage
Over temperature
CDMA 2K mode
2nd @ Po = +28.0 dBm CDMA mode, no additional output trapping
3rd @ Po = +28.0 dBm CDMA mode, no additional output trapping
30 KHz bandwidth
CDMA2K 1X** @ +28.0 dBm Pout, 885 KHz offset
CDMA2K 1X** @ +28.0 dBm Pout, 1.98 MHz offset
824
27
Pout = +28.0 dBm - CDMA mode
Pout = +16.0 dBm - CDMA mode
Pout = +12.0 dBm - CDMA mode
Pout = +28.0 dBm - CDMA mode
No RF Vcntrl = Low
Vcntrl = High
Fixed and regulated (±0.1V tolerance)
Vcntrl = High
Verf = 0V, Vcc = 3.4V
29
22
1.0
2
0.03
+28.0
-30
-30
-90
-50
-58
5.0
-10
36
10
95
515
75
45
2.0
3.0
400
849
31
-48
-55
5.0
800
10
MHz
dB
dB
dB
dB/V
dB/°C
dBm
dBc
dBc
dBm
dBc/30KHz
dBc/30KHz
dB
dB
%
%
mA
mA
mA
mA
mA
V
µA
µA
* Specifications guaranteed over the temperature range of -20°C to +70°C. ** Modulation HPSK in 1.2288 MHz, RC3 PAR = 4.7 @ 1% CCDF.
– Continued from Page 1 –
RF Power Range Truth Table
Power State
Vref
Vcntrl
RF Power Renge
Modulation
When biased as specified, the CHP0205-QM will
achieve the required adjacent channel response for the digital
system specified. Celeritek tests each product under digital
modulation to ensure correlation to customer applications.
Thermal
1. The ground pad on the backside of the CHP0205-QM must
be soldered to the ground plane.
2. All leads of the package must be soldered to the appropriate
electrical connection.
Physical Dimensions and PCB Footprint
Contact the factory for detailed information and dimensions of
HBT power module package and recommended printed circuit
board footprint.
High Power
Low Power
Shutdown
3.0 V
3.0 V
0V
Low
High
Low
16 – 28 dBm
≤16
dBm
—
Recommended Application Circuit
Note: This schematic represents the topology of the application circuit
recommended by Celeritek.
Vref
1000
pF
Vcc1
Vcntrl
RF IN
10
1
2
CHP0205-QM
9
8
3
4
7
5
6
33 µF 10 nF
RF OUT
Vcc2
Evaluation Board Schematic
Board substrate:
ER = 4.60
Thickness = 0.031 in.
3236 Scott Boulevard, Santa Clara, California 95054
Phone: (408) 986-5060
Fax: (408) 986-5095
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