26.0-31.0 GHz GaAs MMIC
Power Amplifier
May 2005 - Rev 05-May-05
29MPA0373
App Note [1] Biasing
-
It is recommended to separately bias the upper and lower amplifiers at Vd(1)=4.5V Id(1+2)=220mA, and
App Note [2] On-board Detector
-
The output signal of the power amplifier is coupled via a capacitively coupled detector, which
comprises a diode connected to the signal path, and a second diode circuit used to provide a temperature compensation signal. The
common bias terminal is Vdet1,2, and is nominally set to forward bias both diodes. The bias is normally provided in 1 of 2 ways. The
Vdet1,2 port can be connected directly to a 1V bias, and given the internal series resistance, results in about 1mA of bias current.
Alternatively, Vdet1,2 can be tied to the same voltage as Vd1-Vd4 through an external series resistor Rdet in the range 3 - 6kΩ.
App Note [3] Bias Arrangement
-
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain or gate pad DC bypass
capacitors (~100-200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or combination (if
gate or drains are tied together) of DC bias pads.
capacitance (~100-200 pF) as close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.
MTTF Table
These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry.
od
Rth
For Individual Stage Bias (Recommended for saturated applications) -- Each DC pad
(Vd1,3,4 and Vg1,2,3,4) needs to have DC bypass
e-
pr
126.0 deg Celsius
150.9 deg Celsius
175.3 deg Celsius
Backplate
Temperature
55 deg Celsius
75 deg Celsius
95 deg Celsius
Channel
Temperature
MTTF Hours
uc
FITs
14.4
°
C/W
15.3
°
C/W
16.2
°
C/W
1.19E+09
8.12E+07
7.74E+06
8.38E-01
1.23E+01
1.29E+02
Bias Conditions:
Vd1=Vd2=Vd3a/b=Vd4a/b=4.5V
Id1=80 mA, Id2=140 mA, Id3a=Id3b=Id4a=Id4b=220 mA
Pr
tio
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 5 of 7
Characteristic Data and Specifications are subject to change without notice.
©2005
Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.
n
Vd(3,4)=4.5V Id(3a+3b)=Id(4a+4b)=440mA, although best performance will result in separately biasing Vd1 through Vd4, with
Id1=80mA, Id2=140mA, Id3a=Id3b=Id4a=Id4b=220mA. It is recommended to use active biasing to keep the currents constant as the
RF power and temperature vary; this gives the most reproducible results. Depending on the supply voltage available and the power
dissipation constraints, the bias circuit may be a single transistor or a low power operational amplifier, with a low value resistor in
series with the drain supply used to sense the current. The gate of the pHEMT is controlled to maintain correct drain current and thus
drain voltage. The typical gate voltage needed to do this is -0.7V. Typically the gate is protected with Silicon diodes to limit the applied
voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is available before applying the positive drain
supply.
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