FLASH
AS29F040
TM
The system can read array data on DQ7-DQ0 on the following “0.” Only an erase operation can change a “0” back to a “1.”
read cycle.
Under this condition, the device halts the operation, and when
However, if after the initial two read cycles, the system the operation has exceeded the timing limits, DQ5 produces a
determines that the toggle bit is still toggling, the system also “1.”
should note whether the value of DQ5 is high (see the sec-
Under both these conditions, the system must issue the
tion on DQ5). If it is, the system should then determine again reset command to return the device to reading array data.
whether the toggle bit is toggling, since the toggle bit may have
stopped toggling just as DQ5 went high. If the toggle bit is no DQ3: Sector Erase Timer
longer toggling, the device has successfully completed the
After writing a sector erase command sequence, the
program or erase operation. If it is still toggling, the device did system may read DQ3 to determine whether or not an erase
not complete the operation successfully, and the system must operation has begun. (The sector erase timer does not apply
write the reset command to return to reading array data.
to the chip erase command.) If additional sectors are selected
The remaining scenario is that the system initially determines for erasure, the entire time-out also applies after each additional
that the toggle bit it toggling and DQ5 has not gone high. The sector erase command. When the time-out is complete, DQ3
system may continue to monitor the toggle bit and DQ5 through switches from “0” to “1.” The system may ignore DQ3 if the
successive read cycles, determining the status as described in system can guarantee that the time between additional sector
the previous paragraph. Alternatively, it may choose to perform erase commands will always be less than 50µs. See also the
other system tasks. In this case, the system must start at the “Sector Erase Command Sequence” section.
beginning of the algorithm when it returns to determine the
status of the operation (top of Figure 4).
After the sector erase command sequence is written, the
system should read the status on DQ7 (Data\ Polling) or DQ6
(Toggle Bit I) to ensure the device has accepted the command
sequence, and then read DQ3. If DQ3 is “1”, the internally
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time has controlled erase cycle has begun; all further commands (other
exceeded a specified internal pulse count limit. Under these than Erase Suspend) are ignored until the erase operation is
conditions DQ5 produces a “1.” This is a failure condition that complete. If DQ3 is “0”, the device will accept additional sector
indicates the program or erase cycle was not successfully erase commands. To ensure the command has been accepted,
completed.
the system software should check the status of DQ3 prior to
The DQ5 failure condition may appear if the system tries to and following each subsequent sector erase command. If DQ3
program a “1” to a location that is previously programmed to is high on the second status check, the last command might
not have been accepted. Table 5 shows the outputs for DQ3.
TABLE 5: WRITE OPERATION STATUS
1
2
1
OPERATION
DQ6
Toggle
Toggle
No toggle
Data
DQ3
0
DQ7
DQ5
DQ2
Embedded Program Algorithm
DQ7\
0
0
No Toggle
Toggle
Toggle
Data
Standard
Mode
Embedded Erase Algorithm
0
0
1
Reading within Erase Suspended Sector
Reading within Non-Erase Suspended Sector
1
N/A
Data
N/A
Erase
Suspend
Mode
Data
DQ7\
Data
0
Toggle
N/A
Erase-Suspend-Program
NOTES:
1. DQ7 and DQ2 requires a valid address when reading status information. Refer to the appropriate subsection for further details.
2. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See “DQ5: Exceed-
ing Timing Limits” for more information.
Micross Components reserves the right to change products or specifications without notice.
AS29F040 • Rev. 3.1 07/19
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