TM
Autoselect Command Sequence
Austin Semiconductor, Inc.
AS29F040
FLASH
AS29F040
FLASH
If DQ5 goes
command
program or erase
the host
Erase Command Sequence
The autoselect
high during a
sequence allows
operation,
Chip
Chip erase is a six-bus-cycle operation. The chip erase
writing the reset command returns the device to reading array
Chip erase is a six-bus-cycle
by writing two unlock cycles,
system to access the manufacturer and devices codes, and
command sequence is initiated
operation. The chip erase
data (also applies
or not a
Erase Suspend).
during
sector is protected. The Command
command sequence is initiated by writing two unlock
unlock write
determine whether
followed by a set-up command. Two additional
cycles,
Definitions table shows the address and data requirements.
followed
are
a set-up command.
the chip erase command, which
cycles
by
then followed by
Two additional unlock write
Autoselect Command
to that shown in the Autoselect
cycles are
invokes the Embedded Erase
command, which in
This method is an alternative
Sequence
in turn
then followed by the chip erase
algorithm. The device
The
Voltage Method) table, which is
allows the host
Codes (High
autoselect command sequence
intended for PROM
turn invokes the Embedded Erase algorithm. The device does
The
does
not
require the system to preprogram prior to erase.
system to access the manufacturer and devices codes, and
not
require the system to preprogram prior to erase. The
and
programmers and requires V
ID
on address bit A9.
Embedded Erase algorithm automatically pre-programs
determine whether
command sequence is initiated by writing
Embedded Erase algorithm automatically preprograms and
to
or not a sector is protected. The Command
The auto select
verifies the entire memory for an all zero data pattern prior
Definitions table
followed by
address and data requirements. verifies the
erase.
memory for an all zero
required to
prior to
any
shows the
the autoselect command. The electrical
entire
The system is not
data pattern
provide
two unlock cycles,
This method is an alternative to
mode, and the
Autoselect
device then enters the autoselect
that shown in the
system may
electrical erase. The
during these operations.
provide any
controls or timings
system is not required to
The Command
Codes (High Voltage Method) table, which is intended for
read at any address any number of times, without initiating
controls or timings
shows the address and data requirements for
Definitions table
during these operations. The Command
Definitions table
command
address and data requirements for
PROM programmers and requires V
ID
on address bit A9.
another command sequence.
the chip erase
shows the
sequence.
The auto
at address XX00h retrieves the manufacturer
A read cycle
select command sequence is initiated by writing the chip erase command sequence.
the chip during the Embedded
Any commands written to
Any commands written to the chip during the Embedded
two
A read cycle at address XX01h returns the device Erase algorithm are ignored.
code.
unlock cycles, followed by the autoselect command. The
algorithm are
can determine the status of the erase
device then enters the autoselect mode, and the
(SA) and the
code. A read cycle containing a sector address
system may Erase
The system
ignored.
The system can determine the status
“Write Operation
read
02h returns 01h if that
of times, without initiating
address
at any
in
address any number
sector is protected, or 00h
operation by using DQ7, DQ6, or DQ2 (see
of the erase
if it
another command sequence.
Sector Address tables for valid
operation by using DQ7, DQ6, or
these status bits). When the
is unprotected (refer to the
Status” for information on
DQ2. See “Write Operation
A read cycle
sector addresses).
at address XX00h retrieves the manufacturer Status” for information on these status bits.
device returns to
Embedded Erase algorithm is complete, the
When the
code.
system
cycle at
write the reset
returns the device code. Embedded Erase algorithm is complete, the device returns to
The
A read
must
address XX01h
command to exit the reading array data and addresses are no longer latched.
A read
mode and return to reading array data.
autoselect
cycle containing a sector address (SA) and the address reading array data
illustrates the algorithm for the erase
Figure 2
and addresses are no longer latched.
Figure
See the
the algorithm for the erase operation.
02h in returns 01h if that sector is protected, or 00h if it is
operation.
2 illustrates
Erase/Program Operations tables in “AC
unprotected. Refer to the Sector Address tables for
Characteristics” for parameters and
tables in “AC
Byte Program Command Sequence
valid sector See the Erase/Program Operations
the Chip /Sector Erase
addresses.
Operation Timings for timing
and the Chip
Programming is a four-bus-cycle operation. The program
Characteristics” for parameters,
waveforms.
/Sector Erase
The system must write the reset command to exit the
command sequence is initiated by writing two unlock write
Operation Timings for timing waveforms.
autoselect mode and return to reading array
command. The
FIGURE 1: PROGRAM OPERATION
cycles, followed by the program set-up
data.
FIGURE 1: PROGRAM OPERATION
program address and data are written next, which in turn
Byte Program Command Sequence
initiate the Embedded Program algorithm. The system is
not
Programming
further controls
operation.
The device
required to provide
is a four-bus-cycle
or timings.
The program
command
provides
is initiated by writing two unlock write
automatically
sequence
internally generated program pulses and
cycles, followed by the program set-up command. The
verify the programmed cell margin. The Command Definitions
program
the address and data requirements
turn initiate
take shows
address and data are written next, which in
for the byte
the Embedded Program algorithm. The system is
not
required
program command sequence.
to provide
Embedded Program algorithm is complete, the
When the
further controls or timings. The device
automatically provides internally generated program pulses and
device then returns to reading array data and addresses are
no
verify the programmed cell margin.
determine the status of the
longer latched. The system can
The Command Definitions
take shows the
by using DQ7 or
requirements for the byte
program operation
address and data
DQ6. See “Write Operation
program command sequence.
Status” for information on these status bits.
When the Embedded Program
the device during the
Any commands written to
algorithm is complete, the
device then returns to reading array data and
Embedded Program Algorithm are ignored.
addresses are no
longer latched. The system can
any sequence
status
across
Programming is allowed in
determine the
and
of the
program operation
A bit cannot be programmed
Operation
sector boundaries.
by using DQ7 or DQ6. See “Write
from a “0”
Status” for
Attempting to do so may halt
back to a “1”.
information on these status bits.
the operation and
Any commands written
Polling algorithm to indicate
set DQ5 to “1”, or cause the Data\
to the device during the
the
Embedded Program Algorithm are ignored.
a succeeding read
operation was successful. However,
Programming is allowed in any
erase operations can
will show that the data is still “0”. Only
sequence and across
sector
“0” to a “1”.
convert a
boundaries.
A bit cannot be programmed from a “0”
back to a “1”.
Attempting to do so may halt the operation and
set DQ5 to “1”, or cause the Data\ Polling algorithm to indicate
the operation was successful. However, a succeeding read will
show that the data is still “0”. Only erase operations can
NOTE:
See the appropriate Command Definitions table for program
NOTE:
See the appropriate Command Definitions table for program
command sequence.
convert a “0” to a “1”.
command sequence.
AS29F040
Rev. 2.2 09/07
AS29F040
•
Rev. 3.1 07/19
Chip Erase Command Sequence
7
7
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