Austin Semiconductor, Inc.
AC TEST CONDITIONS
AC TEST CONDITIONS
Input pulse levels ............................................... Vss to 3.0V
to 3.0V
Input pulse levels ...................................................... Vss
Input rise and fall times .................................................. 3ns
Input rise and fall times ......................................................... 3ns
Input timing reference levels ........................................ 1.5V
Input timing reference levels ............................................... 1.5V
Output reference levels .................................................. 1.5V
Output reference levels ........................................................ 1.5V
Output load ................................................. See Figures 1
Output load ................................................. See Figures 1 and 2
AS5C512K8
AS5C512K8
SRAM
SRAM
Q
167 ohms
C=30pF
1.73V
Q
167 ohms
C=5pF
1.73V
Fig. 1 Output Load
Fig. 1 Output Load
Equivalent
Equivalent
Fig. 2 Output Load
Fig. 2 Output Load
Equivalent
Equivalent
and 2
1.
2.
3.
4.
5.
6.
7.
NOTES
NOTES
All voltages referenced to V
SS
(GND).
1.
8. WE\ is HIGH for READ cycle.
selected. Chip enables and
9. Device is continuously
All voltages referenced to V
SS
(GND).
9. Device is continuously selected. Chip enables and
2. -2V for pulse width < 20ns
output enables are held in their active state.
-2V for pulse width < 20ns
output loading and cycle rates.
output enables are held in their active state.
with, latest
3. I
CC
is dependent on
10. Address valid prior to, or coincident
I
CC
is dependent on output loading and cycle rates.
10. Address valid prior to, or coincident with, latest
4. This parameter is guaranteed but not tested.
occurring chip enable.
This parameter is guaranteed but not tested.
output loading
occurring chip enable.
5. Test conditions as specified with the
11.
t
RC = Read Cycle Time.
Test conditions as specified with the output loading
11.
t
RC = Read Cycle Time.
write enable can initiate and
as shown in Fig. 1 unless otherwise noted.
12. Chip enable and
t
t
t
t
t
as shown in Fig. 1 unless otherwise noted.
HZOE and
t
HZWE
Chip enable and write enable can initiate and
12.
6. LZCE, LZWE, LZOE, HZCE,
terminate a WRITE cycle.
t
LZCE,
t
LZWE,
t
LZOE,
t
HZCE,
t
HZOE and
t
HZWE
is
terminate a WRITE cycle.
is inactive (HIGH).
are specified with CL = 5pF as in Fig. 2. Transition
13. Output enable (OE\)
are specified with CL = 5pF as in Fig. 2. Transition is
13. Output enable (OE\) is inactive (HIGH).
measured ±200mV from steady state voltage.
14. Output enable (OE\) is active (LOW).
measured ±200mV from steady state voltage.
condition,
14. Output enable (OE\) is active (LOW).
7. At any given temperature and voltage
15. ASI does not warrant functionality nor reliability of
t
t
t
At any given temperature and voltage condition,
is less than
15. ASI does not warrant functionality nor reliability of
HZCE is less than LZCE, and HZWE
any product in which the junction temperature
t
t
HZCE is less than
t
LZCE, and
t
HZWE is less than
any product in which the junction temperature
to limit power to
LZWE.
exceeds 150°C. Care should be taken
t
LZWE.
WE\ is HIGH for READ cycle.
exceeds 150°C. Care should be taken to limit power to
8.
acceptable levels.
acceptable levels.
DATA RETENTION ELECTRICAL CHARACTERISTICS
(L Version
Version Only)
DATA RETENTION ELECTRICAL CHARACTERISTICS
(L
Only)
DESCRIPTION
DESCRIPTION
CONDITIONS
CONDITIONS
SYM
V
DR
SYM
MIN MAX UNITS
MIN MAX UNITS NOTES
V
DR
2
I
CCDR
2
t
0
CDR
10
R
t
NOTES
CE\ > V
CE\ > V
CC
-0.2V
CC
-0.2V
Vcc for Retention Data
Vcc for Retention Data
V
-0.2 or 0.2V
V
IN
> V
CC
IN
> V
CC
-0.2 or 0.2V
Data Retention
Data Retention Current
Current
Chip Deselect to Data
to Data
Chip Deselect
Operation Recovery Time
Operation Recovery Time
2
V
V
uA
4
ns
4,
ms
11
Vcc
I
2.0V
Vcc = 2.0V
=
CCDR
t
CDR
t
R
800
mA
0
ns
4
4, 11
10
ms
AS5C512K8
AS5C512K8
Rev. 7.5 01/13
7.0 05/08
Rev.
Micross Components reserves the right to change products or specifications without notice.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
5
MICROSS [ MICROSS COMPONENTS ]
