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5962-9471602HMX 参数 Datasheet PDF下载

5962-9471602HMX图片预览
型号: 5962-9471602HMX
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash Module, 128KX32, 120ns, CQFP68, CERAMIC, QFP-68]
分类和应用:
文件页数/大小: 22 页 / 554 K
品牌: MICROSS [ MICROSS COMPONENTS ]
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FLASH  
AS8F128K32  
Autoselect Command Sequence  
COMMAND DEFINITIONS  
The autoselect command sequence allows the host  
system to access the manufacturer and devices codes, and  
determine whether or not a sector is protected. The Command  
Denitions table shows the address and data requirements. This  
method is an alternative to that shown in the Autoselect Codes  
(High Voltage Method) table, which is intended for PROM  
Writing specic address and data commands or sequences  
into the command register initiates device operations. The  
Command Denitions table denes the valid register com-  
mand sequences. Writing incorrect address and data values  
or writing them in the improper sequence resets the device  
to reading array data.  
All addresses are latched on the falling edge of WEx\ or  
CEx\, whichever happens later. All data is latched on the ris-  
ing edge of WEx\ or CEx\, whichever happens rst. Refer to  
the appropriate timing diagrams in the “AC Characteristics”  
section.  
programmers and requires VID on address bit A9.  
The autoselect command sequence is initiated by writing  
two unlock cycles, followed by the autoselect command. The  
device then enters the autoselect mode, and the system may read  
at any address any number of times, without initiating another  
command sequence.  
Aread cycle at address XX00h or retrieves the  
manu-  
Reading Array Data  
facturer code.Aread cycle at address XX01h returns the device  
code. A read cycle containing a sector address (SA) and the  
address 02h in returns 01h if that sector is protected, or 00h if  
it is unprotected. Refer to the Sector Address tables for valid  
sector addresses.  
The device is automatically set to reading array data after  
device power-up. No commands are required to retrieve data.  
The device is also ready to read array data after completing an  
Embedded Program or Embedded Erase algorithm.  
The system must issue the reset command to re-enable the  
device for reading array data if I/O5* goes high, or while in the  
autoselect mode. See the “Reset Command” section, next.  
See also “Requirements for Reading Array Data” in the  
“Device Bus Operations” section for more information. The  
Read Operations table provides the read parameters, and Read  
Operation Timings diagram shows the timing diagram.  
The system must write the reset command to exit the  
autoselect mode and return to reading array data.  
Byte Program Command Sequence  
Programming is a four-bus-cycle operation. The program  
command sequence is initiated by writing two unlock write  
cycles, followed by the program set-up command. The pro-  
gram address and data are written next, which in turn initiate  
the Embedded Program algorithm. The system is not required  
to provide further controls or timings. The device automati-  
cally provides internally generated program pulses and verify  
the programmed cell margin. The Command Denitions take  
shows the address and data requirements for the byte program  
command sequence.  
Reset Command  
Writing the reset command to the device resets the de-  
vice to reading array data. Address bits are don’t care for this  
command.  
The reset command may be written between the sequence  
cycles in an erase command sequence before erasing begins.  
This resets the device to reading array data. Once erasure  
begins, however, the device ignores reset commands until the  
operation is complete.  
The reset command may be written between the sequence  
cycles in a program command sequence before programming  
begins. This resets the device to reading array data. Once pro-  
gramming begins, however, the device ignores reset commands  
until the operation is complete.  
The reset command may be written between the sequence  
cycles in an autoselect command sequence. Once in the au-  
toselect mode, the reset command must be written to return to  
reading array data.  
If I/O5* goes high during a program or erase operation,  
writing the reset command returns the device to reading array  
data.  
When the Embedded Program algorithm is complete, the  
device then returns to reading array data and addresses are  
no longer latched. The system can determine the status of the  
program operation by using I/O7or I/O6. See “Write Operation  
Status” for information on these status bits.  
Any commands written to the device during the Embed-  
ded Program Algorithm are ignored.  
Programming is allowed in any sequence and across  
sector boundaries. A bit cannot be programmed from a “0”  
back to a “1”. Attempting to do so may halt the operation  
and set I/O5* to “1”, or cause the Data\ Polling algorithm to  
indicate the operation was successful. However, a succeeding  
read will show that the data is still “0”. Only erase operations  
can  
convert a “0” to a “1”.  
*NOTE: applies to every 8th byte (i.e. I/O5, I/O13, I/O21, I/O29)  
Micross Components reserves the right to change products or specications without notice.  
AS8F128K32  
Rev. 2.8 01/10  
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