SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)1
SYMBOL
PARAMETER
A0 - A18 Capacitance
MAX
UNITS
CADD
COE
50
pF
OE\ Capacitance
50
20
20
50
pF
pF
pF
pF
CWE, CCS
WE\ and CS\ Capacitance
I/O 0- I/O 31 Capacitance
WE\ Capacitance
CIO
CWE ("A" version)
NOTE:
1. This parameter is sampled.
AC TEST CONDITIONS
Test Specifications
Input pulse levels.........................................VSS to 3V
Input rise and fall times.........................................5ns
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..............................................See Figure 1
I
OL
Current Source
Device
Under
Test
-
+
Vz = 1.5V
(Bipolar
Supply)
+
Ceff = 50pf
I
Current Source
OH
NOTES:
Figure 1
Vz is programmable from -2V to + 7V.
IOL and IOH programmable from 0 to 16 mA.
Vz is typically the midpoint of VOH and VOL.
IOL and IOH are adjusted to simulate a typical resistive load
circuit.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S512K32 & AS8S512K32A
Rev. 6.0 6/05
4
MICROSS [ MICROSS COMPONENTS ]
