SRAM
MT5C1001
Limited Availability
FUNCTIONAL BLOCK DIAGRAM
VCC
Vss
A6
A5
D
A4
Q
1,048,576-BIT
MEMORY ARRAY
A3
CE\
A15
A14
A13
A8
512 rows x 2048
columns
WE\
POWER
DOWN
A7
COLUMN DECODER
A2 A1 A16 A0 A17 A18 A19 A10 A9 A12 A11
TRUTH TABLE
PIN ASSIGNMENTS
PIN
ASSIGNMENT
MODE
CE\
WE\
X
H
OUTPUT
HIGH-Z
Q
POWER
STANDBY
ACTIVE
STANDBY
READ
H
L
L
A0-A19
Address Inputs
WE\
CE\
D
Write Enable
Chip Enable
Data Input
WRITE
L
HIGH-Z
ACTIVE
Q
NC
Data Output
No Connection
VCC
VSS
+5V Power Supply
Ground
Micross Components reserves the right to change products or specifications without notice.
MT5C1001
Rev. 2.2 01/10
2