P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
TYPICAL APPLICATION CIRCUITS (continued)
VCC
V
IN
8 (14)
7 (12)
8
4
RA
8 (14)
4 (7)
2 (3)
1 (1)
7 (11)
6
2
Q1
I
SG1842/ 43
555
TIMER
3
4 (7)
6 (10)
5 (8)
SG1842/ 43
R
B
R
2
VCS
MPSA63
1
3 (5)
R
R
1
S
C
5 (9)
5 (9)
To other
SGX842/ 43
R1
VCS
2
IPK
=
Where: VCS = 1.67
and VC.S.MAX = 1V (Typ.)
1.44
(RA + 2RB)C
R +R
RS
1
f =
f =
VEAO - 1.3
R1 R2
tSOFTSTART = -ln 1 -
C
RB
RA + 2RB
R1
R1+R2
5
R1+R2
where; VEAO ≡ voltage at the Error Amp Output under
minimum line and maximum load conditions.
FIGURE 19. — ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL
FIGURE 20. — EXTERNAL DUTY CYCLE CLAMP AND
WITH SOFTSTART
MULTI-UNIT SYNCHRONIZATION
Softstart and adjustable peak current can be done with the external
circuitry shown above.
Precision duty cycle limiting as well as synchronizing several 1842/
1843's is possible with the above circuitry.
5V
8 (14)
2.8V
1.1V
2.5V
SG1842/ 43
0.5mA
R
T
4 (7)
2 (3)
CT
SG1842/ 43
R
i
1 (1)
R
F
Discharge
Current
I = 8.2mA
d
R ꢀ 10K
F
FIGURE 21. — OSCILLATOR CONNECTION
FIGURE 22. — ERROR AMPLIFIER CONNECTION
The oscillator is programmed by the values selected for the timing
components RT and CT. Refer to application information for
calculation of the component values.
Error amplifier is capable of sourcing and sinking current up to ꢁ.5mA.
Copyright © 2000
Rev. 1.6 4/00
12
MICROSEMI [ Microsemi ]
