P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1844/SG1845 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
TYPICAL APPLICATION CIRCUITS (continued)
VCC
VIN
8 (14)
4 (7)
7 (12)
8
4
RA
RB
8 (14)
4 (7)
2 (3)
1 (1)
7 (11)
6
Q1
SG1844/45
555
TIMER
3
6 (10)
5 (8)
SG1844/45
R2
R1
2
C
2N2907
1
3 (5)
RS
C
5 (9)
5 (9)
1.44
(RA + 2RB)C
To other
SG1844/45
VC
V2
R1 R2
V1
RS
f =
IPK
=
Where: ꢁ ≤ V1 ≤ 1.ꢁV
tSOFTSTART = -ln1 -
C
R1+R2
RB
RA + 2RB
R1
1.43 - ꢁ.23
R2
f =
ꢁ.5
and V1 =
where: V2 =
R1
R2
R1
1+
1+
R2
FIGURE 18. — ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL
FIGURE 19. — EXTERNAL DUTY CYCLE CLAMP AND
WITH SOFTSTART
MULTI-UNIT SYNCHRONIZATION
Softstart and adjustable peak current can be done with the external
circuitry shown above.
Precision duty cycle limiting for a duty cycle of <5ꢁꢀ, as well as
synchronizing several 1844/45's is possible with the above circuitry.
5V
7 (11)
6 (10)
2.8V
1.1V
2.5V
SG1844/45
0.5mA
RT
2 (3)
CT
Ri
SG1844/45
1 (1)
RF
Discharge
Current
RF ³ 10K
Id = 8.2mA
FIGURE 20. — OSCILLATOR CONNECTION
FIGURE 21. — ERROR AMPLIFIER CONNECTION
The oscillator is programmed by the values selected for the timing
components RT and CT. Refer to application information for
calculation of the component values.
Error amplifier is capable of sourcing and sinking current up to ꢁ.5mA.
Copyright © 2000
Rev. 1.4 4/00
12