PRODUCT DATABOOK 1996/1997
SG1844/SG1845 Series
C
URRENT
-M
ODE
PWM C
ONTROLLER
P
R O D U C T I O N
D
A T A
S
H E E T
A B S O L U T E M A X I M U M R AT I N G S
(Notes 1 & 2)
PACKAGE PIN OUTS
COM
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
8
7
6
5
Supply Voltage (I
CC
< 30mA) ............................................................... Self Limiting
Supply Voltage (Low Impedance Source) ........................................................ 30V
Output Current (Peak) ....................................................................................... ±1A
Output Current (Continuous) ....................................................................... 350mA
Output Energy (Capacitive Load) ....................................................................... 5µJ
Analog Inputs (Pins 2, 3) ................................................................. -0.3V to +6.3V
Error Amp Output Sink Current ..................................................................... 10mA
Operating Junction Temperature
Hermetic (J, Y, F, L Packages) ................................................................... 150°C
Plastic (N, M, D, DM Packages) ................................................................ 150°C
Storage Temperature Range .......................................................... -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) .................................................. 300°C
Note 1. Exceeding these ratings could cause damage to the device.
Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified
terminal.
V
REF
V
CC
OUT UT
GND
M & Y PACKAGE
(Top View)
COM
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
8
7
6
5
V
REF
V
CC
OUT UT
GND
DM PACKAGE
(Top View)
COM
N.C.
V
FB
N.C.
I
SENSE
N.C.
R
T
/C
T
1
2
3
4
5
6
7
14
13
12
11
10
9
8
T H E R M A L D ATA
M PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
N PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
DM PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
D PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
Y PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
J PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
F PACKAGE:
THERMAL RESISTANCE-JUNCTION TO CASE,
θ
JC
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
L PACKAGE:
THERMAL RESISTANCE-JUNCTION TO CASE,
θ
JC
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
35°C/W
120°C/W
3
2
V
REF
N.C.
V
CC
V
C
OUT UT
GND
WR GND
95°C/W
65°C/W
165°C/W
120°C/W
130°C/W
80°C/W
80°C/W
145°C/W
D PACKAGE
(Top View)
COM
N.C.
V
FB
N.C.
I
SENSE
N.C.
R
T
/C
T
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
REF
N.C.
V
CC
V
C
OUT UT
GROUND
OWER GND
J & N PACKAGE
(Top View)
1. COM
2. V
FB
3. I
SENSE
4. R
T
/C
T
5. OWER GND
1
2
3
4
5
10
9
8
7
6
10.V
REF
9. V
CC
8. V
C
7. OUT UT
6. GND
F PACKAGE
(Top View)
1 20 19
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
4
5
6
7
8
18
17
16
15
14
9 10 11 12 13
1. N.C.
2. N.C.
3. COM .
4. N.C.
5. V
FB
6. N.C.
7. I
SENSE
8. R
T
/C
T
9. N.C.
10. N.C.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
N.C.
WR GND
GND
N.C.
OUT UT
N.C.
V
C
V
CC
N.C.
V
REF
L PACKAGE
(Top View)
2
Copyright © 2000
Rev. 1.4 4/00
MICROSEMI [ MICROSEMI CORPORATION ]
