NX2124/2124A
P
HCON
=I
OUT 2
×
D
×
R
DS(ON)
×
K
P
LCON
=I
OUT 2
×
(1
−
D)
×
R
DS(ON)
×
K
P
TOTAL
=P
HCON
+
P
LCON
...(20)
I
SET
=
360mV
K
×
R
DSON
If MOSFET R
DSON
=9mΩ, the worst case thermal
consideration K=1.5, then
I
SET
=
320mV
360mV
=
=
26.7A
K
×
R
DSON
1.5
×
9m
Ω
where the R
DS(ON)
will increases as MOSFET junc-
tion temperature increases, K is R
DS(ON)
temperature
dependency. As a result, R
DS(ON)
should be selected for
the worst case, in which K approximately equals to 1.4
at 125
o
C according to IRFR3706 datasheet
.
Conduc-
tion loss should not exceed package rating or overall
system thermal budget.
Switching loss is mainly caused by crossover con-
duction at the switching transition. The total switching
loss can be approximated.
Layout Considerations
The layout is very important when designing high
frequency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
There are two sets of components considered in
the layout which are power components and small sig-
nal components. Power components usually consist of
input capacitors, high-side MOSFET, low-side MOSFET,
inductor and output capacitors. A noisy environment is
generated by the power components due to the switch-
ing power. Small signal components are connected to
sensitive pins or nodes. A multilayer layout which in-
cludes power plane, ground plane and signal plane is
recommended .
Layout guidelines:
1. First put all the power components in the top
layer connected by wide, copper filled areas. The input
capacitor, inductor, output capacitor and the MOSFETs
should be close to each other as possible. This helps to
reduce the EMI radiated by the power loop due to the
high switching currents through them.
2. Low ESR capacitor which can handle input RMS
ripple current and a high frequency decoupling ceramic
cap which usually is 1uF
need to be practically
touch-
ing the drain pin of the upper MOSFET, a plane connec-
tion is a must.
3. The output capacitors should be placed as close
as to the load as possible and plane connection is re-
quired.
4. Drain of the low-side MOSFET and source of
the high-side MOSFET need to be connected thru a plane
ans as close as possible. A snubber nedds to be placed
as close to this junction as possible.
5. Source of the lower MOSFET needs to be con-
1
×
V
IN
×
I
OUT
×
T
SW
×
F
S
.
..(21)
2
where I
OUT
is output current, T
SW
is the sum of T
R
P
SW
=
and T
F
which can be found in mosfet datasheet, and F
S
is switching frequency. Switching loss P
SW
is frequency
dependent.
Also MOSFET gate driver loss should be consid-
ered when choosing the proper power MOSFET.
MOSFET gate driver loss is the loss generated by dis-
charg
i
ng the gate capacitor and is dissipated in driver
circuits.It is proportional to frequency and is defined as:
P
gate
=
(Q
HGATE
×
V
HGS
+
Q
LGATE
×
V
LGS
)
×
F
S
...(22)
where Q
HGATE
is the high side MOSFETs gate
charge,Q
LGATE
is the low side MOSFETs gate charge,V
HGS
is the high side gate source voltage, and V
LGS
is the low
side gate source voltage.
This power dissipation should not exceed maxi-
mum power dissipation of the driver device.
Over Current Limit Protection
Over current Limit for step down converter is
achieved by sensing current through the low side
MOSFET. For NX2124, the current limit is decided by
the R
DSON
of the low side mosfet. When synchronous
FET is on, and the voltage on SW pin is below 360mV,
the over current occurs. The over current limit can be
calculated by the following equation.
Rev.1.8
02/28/08
13
MICROSEMI [ MICROSEMI CORPORATION ]
