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M1AFS1500-2FGG256I 参数 Datasheet PDF下载

M1AFS1500-2FGG256I图片预览
型号: M1AFS1500-2FGG256I
PDF下载: 下载PDF文件 查看货源
内容描述: Fusion系列混合信号FPGA的 [Fusion Family of Mixed Signal FPGAs]
分类和应用: 现场可编程门阵列可编程逻辑
文件页数/大小: 334 页 / 18785 K
品牌: MICROSEMI [ MICROSEMI CORPORATION ]
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3 – DC and Power Characteristics
General Specifications
Operating Conditions
Stresses beyond those listed in
may cause permanent damage to the device.
Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
Devices should not be operated outside the recommended operating ranges specified in
Table 3-1 •
Absolute Maximum Ratings
Symbol
VCC
VJTAG
VPUMP
VCCPLL
VCCI
VI
Parameter
DC core supply voltage
JTAG DC voltage
Programming voltage
Analog power supply (PLL)
DC I/O output buffer supply voltage
I/O input voltage
1
Commercial
–0.3 to 1.65
–0.3 to 3.75
–0.3 to 3.75
–0.3 to 1.65
–0.3 to 3.75
Industrial
–0.3 to 1.65
–0.3 to 3.75
–0.3 to 3.75
–0.3 to 1.65
–0.3 to 3.75
Units
V
V
V
V
V
V
–0.3 V to 3.6 V (when I/O hot insertion mode is
enabled)
–0.3 V to (VCCI + 1 V) or 3.6 V, whichever
voltage is lower (when I/O hot-insertion mode is
disabled)
–0.3 to 3.75
2
–0.3 to 3.75
2
–0.3 to 3.75
–0.3 to 1.65
–0.3 to 1.65
–0.3 to 3.75
–0.3 to 3.75
2
–0.3 to 3.75
2
–0.3 to 3.75
–0.3 to 1.65
–0.3 to 1.65
–0.3 to 3.75
VCC33A
+3.3 V power supply
V
V
V
V
V
V
VCC33PMP +3.3 V power supply
VAREF
VCC15A
VCCNVM
VCCOSC
Notes:
Voltage reference for ADC
Digital power supply for the analog system
Embedded flash power supply
Oscillator power supply
1. The device should be operated within the limits specified by the datasheet. During transitions, the input signal may
undershoot or overshoot according to the limits shown in
2. Analog data not valid beyond 3.65 V.
3. The high current mode has a maximum power limit of 20 mW. Appropriate current limit resistors must be used, based on
voltage on the pad.
4. For flash programming and retention maximum limits, refer to
For recommended operating limits
refer to
Revision 4
3 -1