LX1671
I N T E G R A T E D
P R O D U C T S
Multiple Output LoadSHARE™ PWM
P
RODUCTION
D
ATA
S
HEET
BLOCK DIAGRAM
WWW .
Microsemi
.C
OM
R
SET
CSX
I
SET
+12V
CS Comp
-
I
RESET
PWM
V
IN
(5V)
R
2
C
IN
R
1
+
VSX
V
TRIP
I
SET
R
S
Q
Q
VCX
HOX
L1
ESR
C
OUT
OUT 1
EOX
LOX
PGX
+5V
Error Comp
+
-
FBX
+
Amplifier/
Compensation
V
REF
20k
Ramp
Oscillator
S
F
VCCL
Hiccup
-
16V
UVLO
16V
+5V
UVLO
V
CC
FAULT
S
R
S
SS1
SS2
SS3
TEMP
5.5V
SS/ENABLE
C
SS
Figure 1
– Typical Block Diagram of Phase 1 and 3
+V
+12V
LDGD
V
REF
VC1
B
LOCK
D
IAGRAM
B
LOCK
D
IAGRAM
+
-
LDFB
VOUT4
+5V
LDDIS
Figure 2
– LDO Controller Block Diagram
Copyright
©
2000
Rev. 1.0a, 2004-06-14
Microsemi
Integrated Products, Power Management
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
MICROSEMI [ MICROSEMI CORPORATION ]
