P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1662/62A, LX1663/63A
SINGLE-CHIP PROGRAMMABLE PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
USING THE LX1662/63 DEVICES
CURRENT LIMIT (continued)
FET SELECTION (continued)
In cases where RL is so large that the trip point current would
belowerthanthedesiredshort-circuitcurrentlimit, aresistor(RS2)
canbeputinparallelwithCS, asshowninFigure11. Theselection
of components is as follows:
For the IRL3102 (13mΩ RDS(ON)), converting 5V to 2.8V at 14A
will result in typical heat dissipation of 1.48W.
Synchronous Rectification – Lower MOSFET
The lower pass element can be either a MOSFET or a Schottky
diode.TheuseofaMOSFET(synchronousrectification)willresult
in higher efficiency, but at higher cost than using a Schottky diode
(non-synchronous).
RL (Required)
RS2
=
RL (Actual)
RS2 + RS
L
L
RS + RS2
CS =
=
Power dissipated in the bottom MOSFET will be:
*
RL (Actual) (R // R )
RL (Actual)
RS2 R
*
S
*
S2
S
PD = I2
R
[1 - Duty Cycle] = 2.24W
*
*
DS(ON)
[IRL3303 or 1.12W for the IRL3102]
Again, select (RS2//RS) < 10kΩ.
FET SELECTION
Catch Diode – Lower MOSFET
A low-power Schottky diode, such as a 1N5817, is recommended
to be connected between the gate and source of the lower
MOSFETwhenoperatingfroma12V-powersupply(seeFigure9).
This will help protect the controller IC against latch-up due to the
inductorvoltagegoingnegative.Althoughlatch-upisunlikely,the
use of such a catch diode will improve reliability and is highly
recommended.
To insure reliable operation, the operating junction temperature
of the FET switches must be kept below certain limits. The Intel
specification states that 115°C maximum junction temperature
should be maintained with an ambient of 50°C. This is achieved
by properly derating the part, and by adequate heat sinking. One
of the most critical parameters for FET selection is the RDS ON
resistance. This parameter directly contributes to the power
dissipation of the FET devices, and thus impacts heat sink design,
mechanical layout, and reliability. In general, the larger the
current handling capability of the FET, the lower the RDS ON will
be, since more die area is available.
Non-Synchronous Operation - Schottky Diode
AtypicalSchottkydiode,withaforwarddropof0.6Vwilldissipate
0.6 14 [1–2.8/5]=3.7W(comparedtothe1.1to2.2Wdissipated
*
*
by a MOSFET under the same conditions). This power loss
becomes much more significant at lower duty cycles – synchro-
nous rectification is recommended especially when a 12V-power
input is used. The use of a dual Schottky diode in a single TO-220
package (e.g. the MBR2535) helps improve thermal dissipation.
TABLE 4 - FET Selection Guide
This table gives selection of suitable FETs from International Rectifier.
Device
RDS(ON)
@
ID @
Max. Break-
down Voltage
10V (mΩ)
TC = 100°C
IRL3803
IRL22203N
IRL3103
IRL3102
IRL3303
IRL2703
6
83
71
40
56
24
17
30
30
30
20
30
30
MOSFET GATE BIAS
7
The power MOSFETs can be biased by one of two methods:
charge pump or 12V supply connected to VC1.
14
13
26
40
1) Charge Pump (Bootstrap)
When 12V is supplied to the drain of the MOSFET, as in
Figure 9, the gate drive needs to be higher than 12V in order
to turn the MOSFET on. Capacitor C10 and diodes D2 & D3
are used as a charge pump voltage doubling circuit to raise
the voltage of VC1 so that the TDRV pin always provides a
high enough voltage to turn on Q1. The 12V supply must
always be connected to VCC to provide power for the IC
itself, as well as gate drive for the bottom MOSFET.
All devices in TO-220 package. For surface mount devices (TO-263 /
D2-Pak), add 'S' to part number, e.g. IRL3103S.
The recommended solution is to use IRL3102 for the high side
and IRL3303 for the low side FET, for the best combination of cost
and performance. Alternative FET’s from any manufacturer could
be used, provided they meet the same criteria for RDS(ON)
.
Heat Dissipated In Upper MOSFET
The heat dissipated in the top MOSFET will be:
2) 12V Supply
When 5V is supplied to the drain of Q1, a 12V supply should
be connected to both VCC and VC1.
PD = (I2
R
Duty Cycle) + (0.51
V
t
f )
*
S
*
*
*
*
DS(ON)
IN
SW
Where tSW is switching transition line for body diode (~100ns)
and fS is the switching frequency.
Copyright © 1999
Rev. 1.1 11/99
14