VSP 94x2A
DATA SHEET
Powerful Scan-Rate Converter
The family is ideally suited to work in conjunction with
the deflection processors SDA 9380 (9402/32) and
DDP 3315C (9412/42). In combination with the ’digital
TV decoder’ MDE 9500, double-scan iDTV is possible.
including Multistandard Color Decoder
Release Note: Revision bars indicate significant
changes to the previous edition.
The package is upward pin-compatible to other
medium-range and high-end devices of the VSP 94xy
family. A 50/60 Hz derivative is also available (9432,
9442). The device comprises a digital multistandard
color decoder, an RGB interface with fast-blank capa-
bility (SCART), digital ITU656 input, scaling units
including panorama, embedded DRAM for upconver-
sion, picture improvements, temporal noise reduction,
as well as A/D and D/A converters.
1. Introduction
The VSP 94x2A (PRIMUS) is a new component of the
Micronas MEGAVISION IC set in a CMOS embed-
®
ded DRAM technology. The VSP 94x2A comprises all
main functions of a digital featurebox in one monolithic
IC. The number of features is limited in favor of a low-
cost solution, but no trade-off has been made concern-
ing picture quality.
Table 1–1: PRIMUS’ versions
Version
Scan Rate
Conversion
Digital Input
Digital Output
Analog Output
1)
1)
9402A (B13)
100i/120i
100i/120i
(✓)
(✓)
✓
9412A (B14)
✓
✓
1)
Input and output cannot be used at same time (pin sharing)
Table 1–2: Hardware Compatibility and Suited Backend ICs
1)
Hardware Compatible
Suited Backend IC
DDP 3315C
SDA 9380
✓
VSP 9402A,
✓
VSP 9405B, VSP 9435B
VSP 9407B, VSP 9437B
(No ITU656 input possible)
VSP 9412A,
✓
VSP 9415B, VSP 9445B
VSP 9417B, VSP 9447B
VSP 9425B, VSP 9427B
✓
✓
1)
With some restrictions. Please refer to pin description and/or respective application note
4
Aug. 16, 2004; 6251-552-1DS
Micronas
MICRONAS [ MICRONAS ]
