DATA SHEET
VSP 94x2A
5. Application Circuit
L1 10
H
L3 10
H
H
34
33
28
29
5
25
26
12
11
72
73
59
60
44
45
1
+1V8
+1V8
vddd4
vssd4
vddd3
vssd3
vddd2
vssd2
vddd1
vssd1
vddargb
vssargb
vddapll
vddac2
vssac2
vddac1
vssac1
vddafbl
vssafbl
tclk
vddp3
vssp3
+3.3 V
+3.3 V
C37
100nF
C36
C47
100nF
C46
C49
10
C39
10
F
F
vddp2
L2 10
H
100nF
vssp2
100nF
vddp1
C35
100nF
C45
100nF
4
C38
10
vssp1
L4 10
F
66
67
42
43
68
64
65
50
51
35
36
71
19
7
C34
100nF
vdd33c
vss33c
C44
100nF
C48
10
F
vdd33rgb
vss33rgb
vdddacy
vssdacy
vdddacu
vssdacu
vdddacv
vssdacv
(reserved)
C43
100nF
C33
100nF
C42
100nF
3
C32
100nF
20.25MHz
656HIN
656ICLK
656IN7
656IN6
656IN5
656IN4
656IN3
656IN2
656IN1
656IN0
78
80
75
77
49
C41
100nF
J1
C31
100nF
C40
100nF
IC1
+3.3V
C30
100nF
BLANK
J2
B2h
B0h
I2C
Address
J3
VSP
adr/tdi
tms
656VIN
9402A
74
8
656hin/clkf20
656vin/blank
R21...R27: 8x 75
9
656clk
656io7
656io6
656io5
656io4
656io3
656io2
656io1
656io0
clkout
hout
656OCLK
656OUT7
656OUT6
656OUT5
656OUT4
656OUT3
656OUT2
656OUT1
C29 47nF
C28 47nF
C27 47nF
46
47
48
38
39
40
41
37
14
58
57
56
55
54
53
52
13
6
10
15
16
21
22
30
31
32
27
17
23
2
RIN2
GIN2
BIN2
FBL2
rin2
MQFP80
gin2
bin2
fbl2
C25 47nF
C24 47nF
C23 47nF
rin1
RIN1
GIN1
stepping
gin1
bin1
fbl1
BIN1
B13
-- / 47 nF
C22
656OUT0
CLKOUT
HOUT
HIN1/FBL1
VIN1
v
C21 100 nF
C20 100 nF
C19 100 nF
C18 100 nF
C17 100 nF
C16 100 nF
C15 100 nF
cvbs7
cvbs6
cvbs5
cvbs4
cvbs3
cvbs2
cvbs1
scl
CVBS7
CVBS6
CVBS5
CVBS4
CVBS3
CVBS2
CVBS1
vout
VOUT
ayout
79
76
61
62
63
18
20
auout
avout
cvbso3
cvbso2
cbbso1
h50
CVBSO3
CVBSO2
CVBSO1
H50
sda
24
reset
v50
R1...R7: 7x 75
V50
xin
70
xout
69
+3V3
+5V
Q1
20M25
R20
51
R21
51
C52
F
C5
22pF*
C6
22pF*
R8
3k3
R9
3k3
T1
33
R19
Y100
U100
V100
SCL
SDA
C53
33
SN7002
SN7002
51
*values are PCB and
crystal dependent
F
T2
C54
33
F
only for 5V I²C master
RESET
T3 T4 T5
3*BC807
buffer not necessary when short
connection to backend-processor
Fig. 5–1: VSP 9402A
Micronas
Aug. 16, 2004; 6251-552-1DS
123
MICRONAS [ MICRONAS ]
