DATA SHEET
VSP 94x2A
2
Table 3–7: I C register overview, continued
Sub
add
Data Byte
D3
(Hex)
D7
TNRS0C
D6
D5
D4
D2
D1
D0
20h
21h
22h
23h
24h
TNRS1C
TNRS2C
TNRS4C
TNRS6C
TNRCLY
TNRS3C
TNRS5C
TNRS7C
TNRCLC
Line-locked Clock PLL
25h
26h
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
IICINCR[18:11]
IICINCR[10:3]
DISRES
IICINCR[2:0]
HINCREXT
HRES
FMOD
HSWIN
KD2
LMOD
KOIWID
PPLIP[9:2]
SETSTABLL
FION
KOIH
HTESTW
FRFIX
LIMEN
FKOI
FILE
FKOIHYS
PPLIP[1:0]
LNL
CLKT
HWID
HDTOTEST
LPFIPMD
VINMTHD
Display Processing
30h
31h
32h
33h
34h
35h
36h
37h
38h
39h
3Ah
3Bh
3Ch
3Dh
3Eh
3Fh
40h
41h
42h
43h
YCOR
CLKOUTON
ALPFOP[9:8]
THRESHC
ASCENTCTI
HCOF
BCOF
AUTOFRRN
ALPFOP[7:0]
BORDPOSV
BORDPOSH [7:0]
BLANPOL
UBORDER
HORWIDTH[7:0]
WINDVSP
HORPOS
FINEDEL
COARSEDEL
BLANEN
BORDPOSH[9:8]
YBORDER
VBORDER
WINDVST
WINDHST
WINDVDR
WINDHDR
WINDVON
HORWIDTH[10:8]
HORPOS[10:8]
WINDHSP1
NOSYNC
WINDHSP0
PPLOFF
WINDHON
LPFOPFF
CHRSHFT
HOUTDEL
NAPPLOP[9:8]
NAPPLOP
PPLOP[9:8]
PPLOP[7:0]
LPFOP
APPLOP
PDGSR
FREEZE
REFRON
STOPMODE
HOUTPOL
HOUTDEL[9:8]
HOUTFR
REFRPER
VOUTPOL
VOUTFR
Micronas
Aug. 16, 2004; 6251-552-1DS
47