VSP 94x2A
DATA SHEET
1)
4.2. Pin Connections and Short Descriptions for VSP 9402 and VSP 9412
1)
For VSP 9412, the pin connections differ for pins: 1, 2, 3, 75, 76, 77, 78, 79 ,80 (see Section 4.3. on page 109).
Pin
No.
Pin Name
Type
Connection
(If not used)
Short Description
1
2
3
4
5
6
7
8
VDDDACY
AYOUT
S/I
O/I
S/I
S
DAC (Y)
Y output
VSSDACY
VSSD2
DAC (Y)
Supply voltage for digital (0 V digital)
Supply voltage for digital (1.8 V digital)
VDDD2
S
2
SDA
I/O
I
I C-Bus data
TMS
Testmode select (Connected to vdd33)
Separate V input for 656 / BLANK output
1)
656VIN/BLANK
I/O
Connect to
Vss and dis-
able blank
9
656CLK
656IO7
VSSP2
VDDP2
SCL
I/O
I/O
S
Leave open
Leave open
Digital input / output clock
10
11
12
13
14
Digital input / output (MSB)
Supply voltage for digital (0 V pad)
Supply voltage for digital (3.3 V pad)
S
2
I
I C-Bus clk
2)
V
I
Connect to
Vss
Vertical pulse for RGB input
15
16
17
656IO6
656IO5
HOUT
I/O
I/O
O
Leave open
Leave open
Leave open
Digital input / output
Digital input / output
Horizontal output (Single or double scan, depen-
dent on version)
3)
18
19
20
21
22
23
H50
O
Leave open
Hout 50 Hz (with skew)
2
ADR / TDI
I
I C address / test data in
4)
V50
O
Leave open
Leave open
Leave open
Leave open
Vout 50 Hz
656IO4
656IO3
VOUT
I/O
I/O
O
Digital input / output
Digital input / output
Vertical output (Single or double scan, dependent
on version)
24
25
26
RESET
VDDP3
VSSP3
I
Reset input (Reset when low)
S
S
Supply voltage for digital (0 V pad)
Supply voltage for digital (3.3 V pad)
106
Aug. 16, 2004; 6251-552-1DS
Micronas