VPC 323xD, VPC 324xD
ADVANCE INFORMATION
2.12. Picture in Picture (PIP) Processing and
Control
live. These configurations are suitable for features
such as turner scan, still picture, still in picture and
simple scan rate conversion.
2.12.1. Configurations
Fig. 2–22 shows an enhanced configuration with two
VPC 32xxD’s. In this case, one live and several still
pictures are inserted into the main live video signal.
The VPCpip processes the inset picture and writes the
original or decimated picture into the field memory.
The VPCmain delivers the main picture, combines it
with the inset picture(s) from the field memory and
stores the combined video signal into a second field
memory for the SRC.
To support PIP and/or scan rate conversion (SRC)
applications, the VPC32xxD provides several control
signals for an external field memory IC.
Fig. 2–21 demonstrates two applications with a single
VPC 32xxD. In these cases the VPCsingle writes the
main picture or one of several inset picture(s) into the
field memory. Only one of these pictures is displayed
YC C
YC C
r
b
r
b
YC C /RGB
VPC
32XXD
(single)
RGB
r
b
DDP
3310B
field
memory
H/V
Def.
CVBS
LLC1,
RSTWR,
WE, IE
LLC2,
FIFORRD,
FIFORD
YC C
r
b
YC C /RGB
YC C
r
b
VPC
r
b
field
memory
32XXD
CVBS
(single)
LLC1,
RSTWR,
WE, IE
LLC1,
RSTWR,
RE
Fig. 2–21: Typical configurations with single VPC 32xxD
YC C
YC C
r
b
r
b
YC C /RGB
VPC
32XXD
(pip)
field
r
b
memory
(for PIP)
CVBS
LLC1,
RSTWR,
WE, IE
(for PIP)
LLC1,
RSTWR,
RE, OE
YC C
YC C
r
b
r
b
YC C /RGB
RGB
VPC
32XXD
(main)
field
r
b
DDP
3310B
memory
H/V
Def.
CVBS
(for main picture)
(for SRC)
LLC2,
FIFORRD,
FIFORD
LLC1,
RSTWR,
WE, IE
Fig. 2–22: Enhanced configuration with two VPC 32xxD
24
Micronas
MICRONAS [ MICRONAS ]
