ADVANCE INFORMATION
VPC 323xD, VPC 324xD
Comb Filter Video Processor
1. Introduction
The VPC 323xD/324xD is a high-quality, single-chip
video front-end, which is targeted for 4:3 and 16:9, 50/
60 and 100/120 Hz TV sets. It can be combined with
other members of the DIGIT3000 IC family (such as
DDP 33x0A/B, TPU 3040) and/or it can be used with
3rd-party products.
– display and deflection control (VPC 324xD)
– peaking, contrast, brightness, color saturation and
tint for RGB/YCrCb and CVBS/S-VHS
– high-quality soft mixer controlled by Fast Blank
1
1
1
1
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, or 36 of
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– PIP processing for four picture sizes (4
, 9, 16
normal size) with 8 bit resolution
The main features of the VPC 323xD/324xD are
– 15 predefined PIP display configurations and expert
mode (fully programmable)
– high-performance adaptive 4H comb filter Y/C sepa-
rator with adjustable vertical peaking
– control interface for external field memory
– I2C-Bus Interface
– multi-standard color decoder PAL/NTSC/SECAM
including all substandards
– four CVBS, one S-VHS input, one CVBS output
– one 20.25 MHz crystal, few external components
– 80-pin PQFP package
– two RGB/YCrCb component inputs, one Fast Blank
(FB) input
– integrated high-quality A/D converters and associ-
ated clamp and AGC circuits
1.1. System Architecture
– multi-standard sync processing
Fig.1–1 shows the block diagram of the video proces-
sor
– linear horizontal scaling (0.25 ... 4), as well as
non-linear horizontal scaling ‘panorama vision’
– PAL+ preprocessing (VPC 323xD)
– line-locked clock, data and sync, or 656-output inter-
face (VPC 323xD)
CIN
Y
Y
Analog
Front-end
Adaptive
Comb
Filter
Color
Decoder
Mixer
2D Scaler
Output
Formatter
Y OUT
VIN1
VIN2
VIN3
PIP
CrCb
OUT
NTSC
PAL
SECAM
Cr
Cb
Cr Panorama
ITU-R 656
ITU-R 601
Mode
YCOE
AGC
2×ADC
NTSC
PAL
Contrast
Brightness
Peaking
Cb
VIN4
Memory
Control
FIFO
CNTL
Saturation
Tint
VOUT
Y/G
U/B
V/R
FB
Y
LLClock
H Sync
V Sync
AVO
Processing
Analog
Component
Front-End
I2C Bus
RGB/
YCrCb
Sync
+
Clock
Cr
Matrix
Contrast
Saturation
Brightness
Tint
FB
Cb
FB
Generation
Clock
Gen.
RGB/
YCrCb
4 x ADC
20.25 MHz I2C Bus
Fig. 1–1: .Block diagram of the VPC 323xD
Micronas
5
MICRONAS [ MICRONAS ]
