ADVANCE INFORMATION
VPC 323xD, VPC 324xD
Contents, continued
Page
Section
Title
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2.9.4.
2.9.5.
2.9.6.
2.9.7.
2.9.8.
2.9.9.
2.10.
Line-Locked 4:2:2 Output Format
Line-Locked 4:1:1 Output Format
ITU-R 656 Output Format
Output Code Levels
Output Ports
Test Pattern Generator
PAL+ Support
2.10.1.
2.11.
Output Signals for PAL+/Color+ Support
Video Sync Processing
2.12.
Picture in Picture (PIP) Processing and Control
Configurations
2.12.1.
2.12.2.
2.12.3.
2.12.4.
2.12.5.
2.12.6.
2.12.7.
2.12.8.
2.12.9.
PIP Display Modes
Predefined Inset Picture Size
Acquisition and Display Window
Frame and Background Color
Vertical Shift of the Main Picture
Free Running Display Mode
Frame and Field Display Mode
External Field Memory
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30
30
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49
3.
Serial Interface
3.1.
I2C-Bus Interface
3.2.
Control and Status Registers
3.2.1.
3.2.2.
Calculation of Vertical and East-West Deflection Coefficients
Scaler Adjustment
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4.
Specifications
4.1.
Outline Dimensions
4.2.
Pin Connections and Short Descriptions
Pin Descriptions (pin numbers for PQFP80 package)
Pin Configuration
4.3.
4.4.
4.5.
Pin Circuits
4.6.
Electrical Characteristics
4.6.1.
4.6.2.
4.6.3.
4.6.4.
4.6.4.1.
4.6.4.2.
4.6.4.3.
4.6.4.4.
4.6.4.5.
4.6.4.6.
4.6.4.7.
4.6.4.8.
4.6.4.9.
4.6.4.10.
Absolute Maximum Ratings
Recommended Operating Conditions
Recommended Crystal Characteristics
Characteristics
Characteristics, 5 MHz Clock Output
Characteristics, 20 MHz Clock Input/Output, External Clock Input (XTAL1)
Characteristics, Reset Input, Test Input, VGAV Input, YCOEQ Input
Characteristics, Power-up Sequence
Characteristics, FPDAT Input/Output
Characteristics, I2C Bus Interface
Characteristics, Analog Video and Component Inputs
Characteristics, Analog Front-End and ADCs
Characteristics, Analog FB Input
Characteristics, Output Pin Specification
Micronas
3
MICRONAS [ MICRONAS ]
