VDP 313xY
ADVANCE INFORMATION
3.6.4.5. Test Input
Symbol
VIL
Parameter
Pin Name
Min.
−
Typ.
−
Max.
0.8
−
Unit
V
Test Conditions
Input Low Voltage
TEST
VIH
Input High Voltage
Input Pull-Down Current
2.0
25
−
V
Ipd
80
170
µA
Vi = VSUPD
3.6.4.6. Analog Video Front-End and A/D Converters
Symbol
VVRT
Parameter
Pin Name
Min.
2.5
−
Typ.
2.6
−
Max.
2.8
Unit
Test Conditions
Reference Voltage Top
Reference Voltage Top Noise
VRT
V
10 µF/10 nF, 1 GΩ Probe
VVRTN
Luma – Path
RVIN
100
mVPP
Input Resistance
VIN1-4
1
−
−
MΩ
pF
Code Clamp–DAC=0
CVIN
Input Capacitance
Full Scale Input Voltage
Full Scale Input Voltage
AGC step width
−
5
−
VVIN
1.8
0.5
−
2.0
0.6
0.166
−
2.2
0.7
−
VPP
VPP
dB
min. AGC Gain
max. AGC Gain
VVIN
AGC
6-Bit Resolution= 64
Steps
fsig= 1 MHz,
– 2 dBr of max. AGC–
Gain
DNLAGC
AGC Differential
Non-Linearity
−
±0.5
LSB
VVINCL
Input Clamping Level, CVBS
Clamping DAC Resolution
−
1.0
−
V
Binary Level = 64 LSB
min. AGC Gain
QCL
−16
−
15
steps
mA
5 Bit − I–DAC, bipolar
VVIN=1.5 V
ICL–LSB
Input Clamping Current per
step
0.7
1.0
1.3
DNLICL
Clamping DAC Differential
Non-Linearity
−
−
±0.5
LSB
Chroma – Path (composite)
RCIN
Input Resistance
SVHS Chroma
CIN1
CIN2
1.4
1.08
−
2.0
1.2
1.5
128
2.6
1.32
−
kΩ
VPP
V
VCIN
Full Scale Input Voltage,
Chroma
VCINDC
Input Bias Level,
SVHS Chroma
Binary Code for Open
Chroma Input
−
−
−
Chroma − Path (component)
RVIN
Input Resistance
CBIN,
CRIN
1
MΩ
Code Clamp−DAC = 0
CVIN
VVIN
VVIN
Input Capacitance
4.5
pF
Full Scale Input Voltage
Full Scale Input Voltage
0.76
1.08
0.84
1.2
0.92
1.32
VPP
VPP
minimal range
extended range
64
Micronas
MICRONAS [ MICRONAS ]
