ADVANCE INFORMATION
VCT 38xxA
Pin 36, EW − East-West Parabola Output (Fig. 6–22)
This pin supplies the parabola signal for the East-West
correction. The drive signal is generated with 15 bit
precision. The analog voltage is generated by a 4 bit
current-DAC with external resistor and uses digital
noise shaping.
Pin 49, 50, 51, AIN1−3 − Analog Audio Input (Fig. 6–
26)
The analog input signal from TUNER or SCART is fed
to this pin. The input signal must be AC-coupled. Alter-
natively these pins can be used as digital I/O ports
(Fig. 6–29).
Pin 37, SENSE − Measurement ADC Input (Fig. 6–24)
This is the input of the analog to digital converter for
the picture and tube measurement. Three measure-
ment ranges are selectable with RSW1 and RSW2.
Pin 52,53, AOUT1, AOUT2 − Analog Audio Output
(Fig. 6–27)
These pins are the analog audio outputs. Connections
to these pins must use a 680 ohm series resistor as
closely as possible to these pins. The output signals
are intended to be AC coupled. Alternatively these pins
can be used as digital I/O ports (Fig. 6–29).
Pin 38, GNDM − Measurement ADC Reference Input
This is the ground reference for the measurement A/D
converter. Connect this pin to GNDAB
Pin 54, VSUPS* − Supply Voltage, Standby
Pin 39, 40, RSW1, RSW2 − Range Switch for Measur-
ing ADC (Fig. 6–23)
Pin 55, GNDS* − Ground, Standby
These pins are open drain pulldown outputs. RSW1 is
switched off during cutoff and whitedrive measure-
ment. RSW2 is switched off during cutoff measure-
ment only.
This is the ground reference for the standby circuitry.
Pins 56 and 57, XTAL1 Crystal Input and XTAL2 Crys-
tal Output (Fig. 6–8)
These pins are connected to an 20.25 MHz crystal
oscillator which is digitally tuned by integrated shunt
capacitances. The CLK20 clock signal is derived from
this oscillator.
Pin 41, SVMOUT − Scan Velocity Modulation Output
(Fig. 6–16)
This output delivers the analog SVM signal. The D/A
converter is a current sink like the RGB D/A convert-
ers. At zero signal the output current is 50% of the
maximum output current.
Pin 58, RESQ − Reset Input/Output (Fig. 6–7)
A low level on this pin resets the VCT 38xxA. The inter-
nal CPU can pull down this pin to reset external
devices connected to this pin.
Pin 42, 43, 44, ROUT, GOUT, BOUT − Analog RGB
Output (Fig. 6–16)
These pins are the analog Red/Green/Blue outputs of
the back-end. The outputs are current sinks.
Pin 59, SCL − I2C Bus Clock (Fig. 6–7)
This pin connects to the I2C bus clock line. The signal
can be pulled down by external slave ICs to slow down
data transfer.
Pin 45, VSUPAB* − Supply Voltage, Analog Back-end
This pin has to be connected to the analog supply volt-
age. No supply current for the digital stages should
flow through this line.
Pin 60, SDA − I2C Bus Data (Fig. 6–7)
This pin connects to the I2C bus data line.
Pin 46, GNDAB* − Ground, Analog Back-end
This pin has to be connected to the analog ground. No
supply current for the digital stages should flow
through this line.
Pin 61−64, P20−P23 − I/O Port (Fig. 6–28)
These pins provide CPU controlled I/O ports.
Pin 47, VRD − DAC Reference Decoupling (Fig. 6–25)
Via this pin the DAC reference voltage is decoupled by
an external capacitor. The DAC output currents
depend on this voltage, therefore a pulldown transistor
can be used to shut off all beam currents. A decou-
pling capacitor of 4.7 µF in parallel to 100 nF (low
inductance) is required.
Pin 48, XREF − DAC Current Reference (Fig. 6–25)
External reference resistor for DAC output currents,
typical 10 kΩ to adjust the output current of the D/A
converters. (see recommended operating conditions).
This resistor has to be connected to analog ground as
closely as possible to the pin.
Micronas
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MICRONAS [ MICRONAS ]
