ADVANCE INFORMATION
VCT 38xxA
1.2. Chip Architecture
VCT 38xx
2
2
2
4
Display
Processor
3
VIN
RGBOUT
Video
Front-end
Panorama
Scaler
Video
Back-end
Comb
Filter
Color
Decoder
3
CIN
SVM
4
RGBIN
VOUT
Pict.Improv.
VSUPAB
GNDAB
2
I C
2
3
AOUT
AIN
MSync
Audio
8
Color, Prio
VSync
I2C Master
2
BE
2
I C
TPU
DMA
CPU
8-bit PWM
RDY
2244kB ROkMB
14-bit PWM
15:1 Mux
RESQ
TEST
10-bit ADC
1 kB
CPU RAM
33kBkB
OOSSDDRAM
Reset
Logic
2 Timer
2 CapCom
Watchdog
24 IO Ports
XTAL1
XTAL2
Clock
Oscillator
16 kB
Text RAM
96 kB
CPU ROM
31
ADB, DB, CB
CLK20
12
Fig. 1–2: Block diagram of the VCT 38xxA (shaded blocks are optional)
Micronas
9