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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
5.4.3  
Preliminary Data Sheet  
Input signal processing  
Noise reduction  
The figure below shows a block diagram of the spatial and temporal motion adaptive  
noise reduction (first order IIR filter). The spatial noise reduction is only performed on the  
luminance signal. The structure of the temporal motion adaptive noise reduction is the  
same for the luminance as for the chrominance signal.  
SNRON  
YR  
Spatial  
Field  
YIN  
noise  
delay  
reduction  
YSNR  
DY  
TNRCLY,  
TNRHOY,  
TNRKOY,  
TNRVAY,  
TNRFIY,  
NRON  
1
0
KY  
Frame  
delay  
Motion  
DTNRON  
detector  
YOUT  
UVOUT  
TNRCLC,  
TNRHOC,  
TNRKOC,  
TNRVAC,  
TNRFIC,  
NRON  
KUV  
1
Frame  
delay  
Motion  
detector  
0
TNRSEL  
0
1
DUV  
Field  
UVIN  
DTNRON  
delay  
UVSNR  
UV1  
Figure 15  
Block diagram of noise reduction  
5.4.3.1 Spatial noise reduction  
Normally a spatial noise reduction reduces the resolution due to the low pass  
characteristic of the used filter. Therefore the spatial noise reduction of the SDA 9410  
works adaptive on the picture content. The low pas filter process is only executed on a  
homogeneous area.  
I²C Bus parameter  
Sub address  
Description  
SNRON  
1: on  
1Ah  
Spatial noise reduction of luminance signal  
0: off  
Table 21  
Input write I²C Bus parameter  
40  
Micronas  
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