SDA9410
Preliminary Data Sheet
Characteristics (Under operating range conditions)
Parameter
Symbol Min
Nom Max Unit Remark
see "Clock circuit
Inputs crystal connections X1/CLKD, X2
diagram" on
page 177
Crystal frequency
Xtal
Cin
27.0
40
MHz fundamental crystal
Equivalent parallel Capacitance
Equivalent parallel Capacitance
Resonance impedance
Digital-To-Analog-Conversion
DAC sample rate
27
27
pF
pF
τ
Cout
ZR
fs
4.5
-1.3
0.8
54.0
-1.9
0.9
60
MHz
RREF_I output current
UREF_I input voltage
Iref
Uref
-2.5 mA
1.0
V
6.3
Characteristics (Under operating range conditions)
Parameter
Symbol Min
Max Unit Remark
Average Supply Current
All Digital Inputs (Including I/O Inputs)
Input Capacitance
t.b.d. t.b.d. mA
All VDD pins, typ. t.b.d.mA
10
pF
µA
Input Leakage Current
-5
5
TTL Inputs: YINM, UVINM, HINM, VINM (Referenced To CLKM)
Set-Up Time
tSU
7
ns
ns
see "Timing diagram clock" on
page 177
Input Hold Time
tIH
6
TTL Inputs: YINS, UVINS, HINS, VINS (Referenced To CLKS)
Set-Up Time
tSU
7
ns
ns
see "Timing diagram clock" on
page 177
Input Hold Time
tIH
6
TTL Outputs: HOUT, VOUT, BLANK (Referenced To CLKOUT)
Hold time
tOH
6
ns
ns
see "Timing diagram clock" on
page 177
Delay time
tOD
25
CL = 50 pF, 27 MHz
TTL Inputs: SYNCENM (Referenced To CLKM)
Set-Up Time
tSU
25
0
ns
ns
see "Timing diagram clock" on
page 177
Input Hold Time
tIH
TTL Inputs: SYNCENS (Referenced To CLKS)
Set-Up Time
tSU
25
ns
see "Timing diagram clock" on
page 177
173
Micronas
MICRONAS [ MICRONAS ]
