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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
Preliminary Data Sheet  
I²C Bus  
Sub address 3C  
Bit  
Name  
Function  
VERPOSM  
D7...D0  
Number of lines from the first active line of the main channel to  
the first active line of the master channel per output frame:  
Number of lines = VERPOSM [VERPOSM = 0]  
Sub address 3D  
Bit Name  
Function  
D7...D0 VERPOSS Number of lines from the first active line of the main channel to  
the first active line of the slave channel per output frame:  
Number of lines = VERPOSS [VERPOSS = 0]  
Sub address 3E  
Bit  
Name  
Function  
D7  
x
x
HORWIDTHM  
D6...D0  
Number of active pixels per line of the master channel in  
system clocks of X1/CLKD:  
Active pixels = 8 * HORWIDTHM [HORWIDTHM = 90]  
Sub address 3F  
Bit  
Name  
Function  
HORWIDTHS  
D7...D0  
Number of active pixels per line of the slave channel in system  
clocks of X1/CLKD:  
Active pixels = 4 * HORWIDTHS [HORWIDTHS = 180]  
147  
Micronas  
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