MSP 44x8G
PRELIMINARY DATA SHEET
4.6.3.5. I2S-Bus Characteristics
Symbol
Parameter
Pin Name
Min.
0.5
−1
Typ.
Max.
Unit
Test Conditions
V
V
Z
Input Low Voltage
Input High Voltage
Input Impedance
Input Leakage Current
I2S_CL
I2S_WS
I2S_CL3
I2S_WS3
I2S_DA_IN1..3
0.2
V
V
I2SIL
I2SIH
SUP2
SUP2
5
pF
µA
V
I2SI
I
1
0 V < U
< DVSUP
INPUT
LEAKI2S
2
V
V
I S Output Low Voltage
I2S_CL
I2S_WS
I2S_DA_OUT
0.4
I
= 1 mA
I2SOL
I2SOH
I2SOL
I2SOH
2
I S Output High Voltage
V
V
I
= −1 mA
SUP2
− 0.3
2
f
f
I S-Word Strobe Output Frequency I2S_WS
48.0
1.536
1.0
kHz
I2SOWS
2
I S-Clock Output Frequency
I2S_CL
MHz
I2SOCL
2
R
I S-Clock Output High/Low-Ratio
0.9
12
40
1.1
I2S10/I2S20
2
Synchronous I S Interface
2
t
I S Input Setup Time
I2S_DA_IN1/2
I2S_CL
ns
for details see Fig. 4–22
s_I2S
2
before Rising Edge of Clock
“I S timing diagram (syn-
chronous interface)”
2
t
t
I S Input Hold Time
ns
ns
h_I2S
after Rising Edge of Clock
2
I S Output Delay Time
I2S_CL
28
C =30 pF
d_I2S
L
after Falling Edge of Clock
I2S_WS
I2S_DA_OUT
2
f
f
I S-Word Strobe Input Frequency
I2S_WS
I2S_CL
48.0
kHz
I2SWS
2
I S-Clock Input Frequency
1.536
MHz
I2SCL
2
R
I S-Clock Input Ratio
0.9
1.1
I2SCL
2
Asynchronous I S Interface
2
t
I S3 Input Setup Time
I2S_CL3
I2S_WS3
I2S_DA_IN3
4
ns
ns
for details see Fig. 4–23
“I S timing diagram (asyn-
chronous interface)”
s_I2S3
2
before Rising Edge of Clock
2
t
I S3 Input Hold Time
40
5
h_I2S3
after Rising Edge of Clock
2
f
f
I S3-Word Strobe Input Frequency I2S_WS3
50
kHz
I2S3WS
2
I S3-Clock Input Frequency
I2S_CL3
3.2
1.1
MHz
I2S3CL
2
R
I S3-Clock Input Ratio
0.9
I2S3CL
58
Micronas
MICRONAS [ MICRONAS ]
