MSP 44x8G
PRELIMINARY DATA SHEET
4.5. Pin Circuits
Pin numbers refer to the PQFP80 package.
DVSUP
P
DVSUP
GND
P
N
N
GND
Fig. 4–7: Output Pins 6, 8, 9, and 10
Fig. 4–11: Input/Output Pins 4, 5, 77, and 78
(I2S_DA_OUT, ADR_DA, ADR_WS, ADR_CL)
(I2S_CL, I2S_WS, D_CTR_I/O_1, D_CTR_I/O_0)
P
N
Gain=0.5
GND
500 kΩ
Fig. 4–8: Input/Output Pins 2 and 3
3−30 pF
N
(I2C_CL, I2C_DA)
2.5 V
3−30 pF
Fig. 4–12: Output/Input Pins 71, 72, and 74
(XTAL_IN, XTAL_OUT, AUD_CL_OUT)
Fig. 4–9: Input Pins 7, 17, 22, 19, 20, 21, 70, and 80
(I2S_DA_IN1..3, I2S_CL3, I2S_WS3, RESETQ,
TESTEN, STANDBYQ)
ANA_IN1+
ANA_IN2+
A
D
DVSUP
23 kΩ
ANA_IN−
VREFTOP
23 kΩ
GND
ADR_SEL
Fig. 4–13: Input Pins 58, 67, 68, and 69
(VREFTOP, ANA_IN1+, ANA_IN-, ANA_IN2+)
Fig. 4–10: Input Pin 79 (ADR_SEL)
48
Micronas
MICRONAS [ MICRONAS ]
