MSP 44x8G
PRELIMINARY DATA SHEET
Contents
Page
Section
Title
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6
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7
1.
Introduction
1.1.
1.2.
1.3.
Features of the MSP 44x8G Family
MSP 44x8G Version List
MSP 44x8G Versions and their Application Fields
8
2.
Functional Description
8
2.1.
Architecture of the MSP 44x8G Family
MSP 44x8G Sound IF Processing
Analog Sound IF Input
9
2.2.
9
2.2.1.
2.2.2.
2.2.3.
2.2.4.
2.2.5.
2.3.
9
Demodulator: Standards and Features
Preprocessing of Demodulator Signals
Automatic Sound Select
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10
10
12
12
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12
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13
13
13
13
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Manual Mode
Preprocessing for SCART and I2S Input Signals
Source Selection and Output Channel Matrix
Mixing Unit
2.4.
2.4.1.
2.5.
Audio Baseband Processing
Automatic Volume Correction (AVC)
Main and Aux Outputs
2.5.1.
2.5.2.
2.5.3.
2.6.
Quasi-Peak Detector
SCART Signal Routing
2.6.1.
2.6.2.
2.7.
SCART DSP In and SCART Out Select
Stand-by Mode
I2S Bus Interfaces
Synchronous I2S-Interface(s)
Asynchronous I2S-Interface
ADR Bus Interface
2.7.1.
2.7.2.
2.8.
2.9.
Digital Control I/O Pins and Status Change Indication
Preemphasis
2.10.
2.11.
Clock PLL Oscillator and Crystal Specifications
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15
15
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3.
Control Interface
3.1.
I2C Bus Interface
3.1.1.
3.1.2.
3.1.3.
3.1.4.
3.1.4.1.
3.1.4.2.
3.1.4.3.
3.1.4.4.
3.2.
Device and Subaddresses
Description of CONTROL Register
Protocol Description
Proposals for General MSP 44x8G I2C Telegrams
Symbols
Write Telegrams
Read Telegrams
Examples
Start-Up Sequence: Power-Up and I2C Controlling
MSP 44x8G Programming Interface
User Registers Overview
Description of User Registers
STANDARD SELECT Register
STANDARD RESULT Register
3.3.
3.3.1.
3.3.2.
3.3.2.1.
3.3.2.2.
2
Micronas
MICRONAS [ MICRONAS ]
