PRELIMINARY DATA SHEET
MSP 34x2G
3.3.2.5. Read Registers on I2C Subaddress 11hex
Table 3–10: Read Registers on I2C Subaddress 11hex
Register
Address
Function
Name
00 40hex
I2S CONFIGURATION Register
I2S_CONFIG
bit[15:1]
0
not used, must be set to “0”
bit[0]
I2S_CL frequency and I2S data sample length for
master mode
0
1
2 x 16 bit (1.024 MHz)
2 x 32 bit (2.048 MHz))
00 7Ehex
STANDARD RESULT Register
STANDARD_RES
Readback of the detected TV Sound or FM-Radio Standard
bit[15:0] 00 00hex Automatic Standard Detection could not find
a sound standard
00 02hex MSP Standard Codes (see Table 3–8)
...
00 40hex
>07 FFhex Automatic Standard Detection still active
02 00hex
STATUS Register
STATUS
Contains all user relevant internal information about the status of the MSP
bit[15:10]
bit[8]
undefined
0/1
“1” indicates bilingual sound mode or SAP present
(internally evaluated from received analog or
digital identification signal)
bit[7]
0/1
0/1
“1” indicates independent mono sound
(only for NICAM on MSP 3412G and MSP 3452G)
bit[6]
mono/stereo indication (internally evaluated from
received analog or digital identification signal)
bit[5,9]
00
01
analog sound standard (FM or AM) active
not obtainable
10
digital sound (NICAM) available (MSP 3412G and
MSP 3452G only)
11
bad reception condition of digital sound (NICAM) due to:
a. high error rate
b. unimplemented sound code
c. data transmission only
bit[4]
bit[3]
bit[2]
0/1
0/1
low/high level of digital I/O pin D_CTR_I/O_1
low/high level of digital I/O pin D_CTR_I/O_0
0
1
detected secondary carrier (2nd A2 or SAP carrier)
no secondary carrier detected
bit[1]
0
1
detected primary carrier (Mono or MPX carrier)
no primary carrier detected
bit[0]
undefined
If STATUS change indication is activated by means of MODUS[1]: Each
change in the STATUS register sets the digital I/O pin D_CTR_I/O_1 to high
level. Reading the STATUS register resets D_CTR_I/O_1.
Micronas
31