PRELIMINARY DATA SHEET
MSP 34x1G
6.2. DSP Write and Read Registers for Manual/Compatibility Mode
Table 6–3: DSP-Write Registers; Subaddress: 12hex, all registers are readable as well
Write Register
Address Bits
(hex)
Operational Modes and Adjustable Range
Reset
Mode
Page
Volume SCART1 channel: Ctrl. mode
FM Fixed Deemphasis
00 07
00 0F
[7..0]
[15..8]
[7..0]
[7..0]
[7..0]
[7..0]
[Linear mode / logarithmic mode]
[50 µs, 75 µs, OFF]
[OFF, WP1]
00
95
95
95
96
96
95
hex
50 µs
OFF
B/G
FM Adaptive Deemphasis
Identification Mode
00 15
00 17
00 40
[B/G, M]
FM DC Notch
[ON, OFF]
ON
Volume SCART2 channel: Ctrl. mode
[Linear mode / logarithmic mode]
00
hex
Table 6–4: DSP Read Registers; Subaddress: 13hex, all registers are not writable
Additional Read Registers
Address Bits
(hex)
Output Range
Page
Stereo detection register for
A2 Stereo Systems
00 18
[15..8]
[80 ... 7F
]
8 bit two’s complement
96
hex
hex
DC level readout FM1/Ch2-L
DC level readout FM2/Ch1-R
00 1B
00 1C
[15..0]
[15..0]
[8000
[8000
... 7FFF
... 7FFF
]
]
16 bit two’s complement
16 bit two’s complement
96
96
hex
hex
hex
hex
MICRONAS INTERMETALL
85
MICRONAS [ MICRONAS ]
