PRELIMINARY DATA SHEET
MSP 34x1G
3.3.2.7. Read Registers on I2C Subaddress 13hex
Table 3–12: Read Registers on I2C Subaddress 13hex
Register
Address
Function
Name
QUASI-PEAK DETECTOR READOUT
00 19hex
00 1Ahex
Quasi-Peak Detector Readout Left
Quasi-Peak Detector Readout Right
QPEAK_L
QPEAK_R
bit [15..0] 0hex... 7FFFhex values are 16 bit two’s complement (only positive)
MSP 34X1G VERSION READOUT REGISTERS
00 1Ehex MSP Hardware Version Code
MSP_HARD
bit [15..8] 01hex
MSP 34x1G - A1
A change in the hardware version code defines hardware optimizations that
may have influence on the chip’s behavior. The readout of this register is iden-
tical to the hardware version code in the chip’s imprint.
MSP Major Revision Code
MSP_REVISION
MSP_PRODUCT
bit [7..0] 07hex
MSP 34x1G - A1
The major revision code of the MSP 34x1G is 7.
00 1Fhex
MSP Product Code
bit [15..8] 01hex
0Bhex
MSP 3401G - A1
MSP 3411G - A1
MSP 3431G - A1
MSP 3441G - A1
MSP 3451G - A1
1Fhex
29hex
33hex
By means of the MSP-Product Code, the control processor is able to decide
which TV sound standards have to be considered.
MSP ROM Version Code
MSP_ROM
bit [7..0] 41hex
42hex
MSP 34x1G - A1
MSP 34x1G - A2
A change in the ROM version code defines internal software optimizations,
that may have influence on the chip’s behavior, e.g. new features may have
been included. While a software change is intended to create no compatibility
problems, customers that want to use the new functions can identify new
MSP 34x1G versions according to this number.
To avoid compatibility problems with MSP 3410B and MSP 34x0D, an offset of
40hex is added to the ROM version code of the chip’s imprint.
MICRONAS INTERMETALL
43
MICRONAS [ MICRONAS ]
