MSP 34x1G
PRELIMINARY DATA SHEET
Multistandard Sound Processor Family with Virtual
Dolby Surround
signal conforming to the standard recommended by
the Broadcast Television Systems Committee (BTSC).
The DBX noise reduction, or alternatively, Micronas
Noise Reduction (MNR) is performed alignment free.
Release Note: Revision bars indicate significant
changes to the previous edition.The hardware and
software description in this document is valid for
the MSP 34x1G version B8 and following versions.
Other processed standards are the Japanese FM-FM
multiplex standard (EIA-J) and the FM Stereo Radio
standard.
1. Introduction
Current ICs have to perform adjustment procedures in
order to achieve good stereo separation for BTSC and
EIA-J. The MSP 34x1G has optimum stereo perfor-
mance without any adjustments.
The MSP 34x1G family of single-chip Multistandard
Sound Processors covers the sound processing of all
analog TV-Standards worldwide, as well as the NICAM
digital sound standards. The full TV sound processing,
starting with analog sound IF signal-in, down to pro-
cessed analog AF-out, is performed on a single chip.
Figure 1–1 shows a simplified functional block diagram
of the MSP 34x1G.
All MSP 34xxG versions are pin compatible to the
MSP 34xxD. Only minor modifications are necessary
to adapt a MSP 34xxD controlling software to the
MSP 34xxG. The MSP 34x1G further simplifies con-
trolling software. Standard selection requires a single
I2C transmission only.
The MSP 34x1G has all functions of the MSP 34x0G
with the addition of a virtual surround sound feature.
The MSP 34x1G has built-in automatic functions: The
IC is able to detect the actual sound standard automat-
ically (Automatic Standard Detection). Furthermore,
pilot levels and identification signals can be evaluated
internally with subsequent switching between mono/
stereo/bilingual; no I2C interaction is necessary (Auto-
matic Sound Selection).
Surround sound can be reproduced to a certain extent
with two loudspeakers. The MSP 34x1G includes the
Micronas virtualizer algorithm “3D-PANORAMA” which
has been approved by the Dolby1) Laboratories for
compliance with the "Virtual Dolby Surround" technol-
ogy. In addition, the MSP 34x1G includes the “PAN-
ORAMA” algorithm.
The ICs are produced in submicron CMOS technology.
The MSP 34x1G is available in the following packages:
PLCC68 (not intended for new designs), PSDIP64,
PSDIP52, PQFP80, and PLQFP64.
These TV sound processing ICs include versions for
processing the multichannel television sound (MTS)
Loud-
speaker
Loud-
speaker
Sound
Sound IF1
De-
modulator
Pre-
processing
ADC
DAC
DAC
Sound IF2
Subwoofer
Processing
Headphone
Sound
Processing
Headphone
2
I S1
Prescale
Prescale
2
I S2
2
I S
SCART1
SCART2
SCART3
DAC
DAC
SCART
DSP
Input
SCART1
SCART2
ADC
SCART
Output
Select
Select
SCART4
MONO
Fig. 1–1: Simplified functional block diagram of the MSP 34x1G
6
Micronas
MICRONAS [ MICRONAS ]
