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MSP3440G 参数 Datasheet PDF下载

MSP3440G图片预览
型号: MSP3440G
PDF下载: 下载PDF文件 查看货源
内容描述: 多标准音频处理器系列 [Multistandard Sound Processor Family]
分类和应用:
文件页数/大小: 106 页 / 1906 K
品牌: MICRONAS [ MICRONAS ]
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DATA SHEET  
MSP 34x0G  
6.5. Manual/Compatibility Mode:  
Description of DSP Write Registers  
Linear Mode  
Volume SCART1  
Volume SCART2  
OFF  
6.5.1. Additional Channel Matrix Modes  
00 07hex  
H
00 40hex  
H
Loudspeaker Matrix  
Headphone Matrix  
SCART1 Matrix  
SCART2 Matrix  
I2S Matrix  
00 08hex  
00 09hex  
00 0Ahex  
00 41hex  
00 0Bhex  
00 0Chex  
L
L
L
L
L
L
0000 0000  
RESET  
00hex  
0 dB gain  
(digital full scale (FS) to 2  
VRMS output)  
0100 0000  
40hex  
+6 dB gain (6 dBFS to 2  
VRMS output)  
0111 1111  
7Fhex  
Quasi-Peak  
Detector Matrix  
SUM/DIFF  
0100 0000  
0101 0000  
0110 0000  
0111 0000  
1000 0000  
1001 0000  
40hex  
50hex  
60hex  
70hex  
80hex  
90hex  
Note: SCART Volume linear mode will not be sup-  
ported in the future (documented for compatibil-  
ity reasons only).  
AB_XCHANGE  
PHASE_CHANGE_B  
PHASE_CHANGE_A  
A_ONLY  
6.5.3. FM Fixed Deemphasis  
B_ONLY  
FM Deemphasis  
00 0Fhex  
H
50 µs  
0000 0000  
RESET  
00hex  
This table shows additional modes for the channel  
matrix registers.  
75 µs  
J17  
0000 0001  
0000 0100  
0011 1111  
01hex  
04hex  
3Fhex  
The sum/difference mode can be used together with  
the quasi-peak detector to determine the sound mate-  
rial mode. If the difference signal on channel B (right)  
is near to zero, and the sum signal on channel A (left)  
is high, the incoming audio signal is mono. If there is a  
significant level on the difference signal, the incoming  
audio is stereo.  
OFF  
Note: This register is initialized during STANDARD  
SELECTION and is automatically updated when  
Auto-matic Sound Select (MODUS[0]=1) is on.  
6.5.2. Volume Modes of SCART1/2 Outputs  
6.5.4. FM Adaptive Deemphasis  
Volume Mode SCART1  
Volume Mode SCART2  
linear  
00 07hex  
00 40hex  
[3:0]  
[3:0]  
0hex  
FM Adaptive  
00 0Fhex  
L
Deemphasis WP1  
0000  
RESET  
OFF  
WP1  
0000 0000  
RESET  
00hex  
3Fhex  
logarithmic  
0001  
1hex  
0011 1111  
Note: This register is initialized during STANDARD  
SELECTION and is automatically updated when  
Auto-matic Sound Select (MODUS[0]=1) is on.  
Micronas  
May 27, 2003; 6251-476-1DS  
99  
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