MSP 34x0G
DATA SHEET
4.5. Pin Circuits
DVSUP
23 kΩ
>300 k
DVSS
23 kΩ
Fig. 4–10: Input Pin: RESETQ
GND
ADR_SEL
Fig. 4–16: Input Pin: ADR_SEL
AVSUP
200 k
N
Fig. 4–11: Input Pin TESTEN
GND
Fig. 4–17: Input/Output Pins: I2C_CL, I2C_DA
24 kΩ
≈ 3.75 V
DVSUP
P
Fig. 4–12: Input Pin: MONO_IN
N
GND
40 kΩ
≈ 3.75 V
Fig. 4–18: Input/Output Pins:
I2S_CL, I2S_WS, D_CTR_I/O_1, D_CTR_I/O_0
Fig. 4–13: Input Pins: SC4-1_IN_L/R
P
Fig. 4–14: Input Pins:
I2S_DA_IN1, I2S_DA_IN2, STANDBYQ
500 kΩ
3−30 pF
N
2.5 V
ANA_IN1+
ANA_IN2+
3−30 pF
Fig. 4–19: Input/Output Pins:
XTAL_IN, XTAL_OUT, AUD_CL_OUT
A
D
ANA_IN−
VREFTOP
Fig. 4–15: Input Pins:
VREFTOP, ANA_IN1+, ANA_IN-, ANA_IN2+
60
May 27, 2003; 6251-476-1DS
Micronas
MICRONAS [ MICRONAS ]
