MAS 35x9F
DATA SHEET
Limit Values
Symbol
Parameter
Pin Name
Unit
Test Conditions
Min.
Typ.
Max.
XTALKAO
Crosstalk attenuation left/right OUTLR
channel (headphone)
80
dB
f = 1 kHz, sine wave,
OUTL/R: RL≥16 Ω
(see Fig. 5–1 on page 89)
analog gain = 0 dB
input = −3 dBFS
PSRRAO
Power supply rejection ratio
for analog audio outputs
AVDD0/1
OUTL/R
70
35
dB
dB
1 kHz sine at 100 mVrms
≤100 kHz sine at
100 mVrms
4.6.4. DC/DC Converter Characteristics
at T = T , V = 1.2 V, V = 3.0 V, f = 18.432 MHz, f = 384 kHz, PWM mode, L = 22 µH, in P(L/M)QFP pack-
A
in
outn
clk
sw
age (unless otherwise noted) Typ. values for T = 25 °C
A
Limit Values
Symbol
Parameter
Pin Name
Unit
Test Conditions
Min.
Typ.
Max.
VIN
VIN
Minimum start-up input
voltage
0.9
V
ILOAD ≤ 1 mA,
DCCF = 5050hex (reset)
1)
Minimum operating input
voltage
DC1
DC2
0.7
0.8
V
V
V
ILOAD = 50 mA,
DCCF = 5050hex (reset)
DC1
DC2
1.1
1.2
ILOAD = 200 mA,
DCCF = 5050hex (reset)
VOUT
Programmable output voltage VSENSn
range
2.0
3.5
Voltage settings in DCCF
register (I2C subaddress
76hex
)
VOTOL
ILOAD1
ILOAD2
Output voltage tolerance
VSENSn
VSENSn
−4
4
%
ILOAD = 20 mA
TA = 25 °C
2)
Output current
1 battery cell
200
600
mA
mA
%/V
%
VIN = 0.9...1.5 V, 330 µF
VIN = 1.8...3.0 V, 330 µF
ILOAD = 20 mA
Output current
2 battery cells
dVOUT
/
Line regulation
VSENSn
VSENSn
0.7
dVIN/VOUT
dVOUT
/
Load regulation
−1.8
ILOAD = 20...200 mA,
VIN = 2.4 V, VOUT = 3.5 V
VOUT
hmax
Maximum efficiency
Switching frequency
95
%
fswitch
DCSOn
DCSOn
297
384
250
576
kHz
(see Section 2.6.2. on
page 12), (see Table 3–3)
fstartup
Switching frequency during
start-up
kHz
VSENSn < 1.9 V
1) Since the regulators are bootstrapped, once started they will operate down to 0.7 V input voltage
2) PFM mode regulates approx. 1% higher
84
June 30, 2004; 6251-505-1DS
Micronas